Epitaxial-template structure utilizing Ge-on-insulator stripe arrays with nanospacing for advanced heterogeneous integration on Si platform

Abdul Manaf Hashim, Mohamad Anisuzzaman, Shunpei Muta, Taizoh Sadoh, Masanobu Miyao

Research output: Contribution to journalArticle

10 Citations (Scopus)

Abstract

A possible Ge-on-insulator (GOI) structure, namely, stripe arrays with nanospacing, was proposed as a promising epitaxial template structure for the Ge epitaxial layer. Agglomeration-free single-crystalline GOI stripe arrays with thickness of 50nm and spacing down to 0.5 μm were successfully grown by the Si-seeded rapid-melting growth technique. The growth of GOI stripe arrays with a spacing of 0.1 μm was not achieved owing due to the severe agglomeration of Ge during the heat treatment. This may be due to the small adhesion area of the capping layer between the stripes where it could not withstand the force caused by Ge agglomeration. From the electron backscattering diffraction (EBSD) measurement, the rotational growth was confirmed by the observation of various orientations when the thickness of the Ge layer was reduced to 20 nm. This is probably due to the decrease in the bulk effects that basically act to prevent the slip of lattice planes. These preliminary results provide a breakthrough towards the realization of heterogeneous integration on Si platforms with multifunctionalities.

Original languageEnglish
Article number06FF04
JournalJapanese journal of applied physics
Volume51
Issue number6 PART 2
DOIs
Publication statusPublished - Jun 1 2012

Fingerprint

agglomeration
templates
Agglomeration
platforms
insulators
spacing
Epitaxial layers
Backscattering
backscattering
Melting
adhesion
slip
heat treatment
Adhesion
Diffraction
Heat treatment
melting
Crystalline materials
Electrons
diffraction

All Science Journal Classification (ASJC) codes

  • Engineering(all)
  • Physics and Astronomy(all)

Cite this

Epitaxial-template structure utilizing Ge-on-insulator stripe arrays with nanospacing for advanced heterogeneous integration on Si platform. / Hashim, Abdul Manaf; Anisuzzaman, Mohamad; Muta, Shunpei; Sadoh, Taizoh; Miyao, Masanobu.

In: Japanese journal of applied physics, Vol. 51, No. 6 PART 2, 06FF04, 01.06.2012.

Research output: Contribution to journalArticle

@article{3a939fbff7fc4dabb38eb4695de75e64,
title = "Epitaxial-template structure utilizing Ge-on-insulator stripe arrays with nanospacing for advanced heterogeneous integration on Si platform",
abstract = "A possible Ge-on-insulator (GOI) structure, namely, stripe arrays with nanospacing, was proposed as a promising epitaxial template structure for the Ge epitaxial layer. Agglomeration-free single-crystalline GOI stripe arrays with thickness of 50nm and spacing down to 0.5 μm were successfully grown by the Si-seeded rapid-melting growth technique. The growth of GOI stripe arrays with a spacing of 0.1 μm was not achieved owing due to the severe agglomeration of Ge during the heat treatment. This may be due to the small adhesion area of the capping layer between the stripes where it could not withstand the force caused by Ge agglomeration. From the electron backscattering diffraction (EBSD) measurement, the rotational growth was confirmed by the observation of various orientations when the thickness of the Ge layer was reduced to 20 nm. This is probably due to the decrease in the bulk effects that basically act to prevent the slip of lattice planes. These preliminary results provide a breakthrough towards the realization of heterogeneous integration on Si platforms with multifunctionalities.",
author = "Hashim, {Abdul Manaf} and Mohamad Anisuzzaman and Shunpei Muta and Taizoh Sadoh and Masanobu Miyao",
year = "2012",
month = "6",
day = "1",
doi = "10.1143/JJAP.51.06FF04",
language = "English",
volume = "51",
journal = "Japanese Journal of Applied Physics",
issn = "0021-4922",
number = "6 PART 2",

}

TY - JOUR

T1 - Epitaxial-template structure utilizing Ge-on-insulator stripe arrays with nanospacing for advanced heterogeneous integration on Si platform

AU - Hashim, Abdul Manaf

AU - Anisuzzaman, Mohamad

AU - Muta, Shunpei

AU - Sadoh, Taizoh

AU - Miyao, Masanobu

PY - 2012/6/1

Y1 - 2012/6/1

N2 - A possible Ge-on-insulator (GOI) structure, namely, stripe arrays with nanospacing, was proposed as a promising epitaxial template structure for the Ge epitaxial layer. Agglomeration-free single-crystalline GOI stripe arrays with thickness of 50nm and spacing down to 0.5 μm were successfully grown by the Si-seeded rapid-melting growth technique. The growth of GOI stripe arrays with a spacing of 0.1 μm was not achieved owing due to the severe agglomeration of Ge during the heat treatment. This may be due to the small adhesion area of the capping layer between the stripes where it could not withstand the force caused by Ge agglomeration. From the electron backscattering diffraction (EBSD) measurement, the rotational growth was confirmed by the observation of various orientations when the thickness of the Ge layer was reduced to 20 nm. This is probably due to the decrease in the bulk effects that basically act to prevent the slip of lattice planes. These preliminary results provide a breakthrough towards the realization of heterogeneous integration on Si platforms with multifunctionalities.

AB - A possible Ge-on-insulator (GOI) structure, namely, stripe arrays with nanospacing, was proposed as a promising epitaxial template structure for the Ge epitaxial layer. Agglomeration-free single-crystalline GOI stripe arrays with thickness of 50nm and spacing down to 0.5 μm were successfully grown by the Si-seeded rapid-melting growth technique. The growth of GOI stripe arrays with a spacing of 0.1 μm was not achieved owing due to the severe agglomeration of Ge during the heat treatment. This may be due to the small adhesion area of the capping layer between the stripes where it could not withstand the force caused by Ge agglomeration. From the electron backscattering diffraction (EBSD) measurement, the rotational growth was confirmed by the observation of various orientations when the thickness of the Ge layer was reduced to 20 nm. This is probably due to the decrease in the bulk effects that basically act to prevent the slip of lattice planes. These preliminary results provide a breakthrough towards the realization of heterogeneous integration on Si platforms with multifunctionalities.

UR - http://www.scopus.com/inward/record.url?scp=84863304818&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84863304818&partnerID=8YFLogxK

U2 - 10.1143/JJAP.51.06FF04

DO - 10.1143/JJAP.51.06FF04

M3 - Article

AN - SCOPUS:84863304818

VL - 51

JO - Japanese Journal of Applied Physics

JF - Japanese Journal of Applied Physics

SN - 0021-4922

IS - 6 PART 2

M1 - 06FF04

ER -