Evaluation of interface states and minority carrier generation lifetime for strained Si/SiGe wafers using transient capacitance method

Dong Wang, Masaharu Ninomiya, Masahiko Nakamae, Hiroshi Nakashima

Research output: Contribution to conferencePaper

Abstract

Interface states intensity (Nss) and minority carrier generation lifetime (τg) were evaluated for strained Si (St-Si)/SiGe wafers using deep level transient spectroscopy (DLTS) and Metal-Oxide-Semiconductor (MOS) transient capacitance (C-t) methods. The dependences of Nss and τ g on St-Si thickness (dsi) and Ge fraction (Ge%) were shown clearly. By the same gate film fabrication and electrical measurements for a bulk Si MOS, the values of Nss and τg of St-Si MOS are similar to those of bulk Si MOS, showing good wafer quality.

Original languageEnglish
Pages2148-2150
Number of pages3
Publication statusPublished - Dec 1 2004
Event2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 - Beijing, China
Duration: Oct 18 2004Oct 21 2004

Other

Other2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004
CountryChina
CityBeijing
Period10/18/0410/21/04

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All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Wang, D., Ninomiya, M., Nakamae, M., & Nakashima, H. (2004). Evaluation of interface states and minority carrier generation lifetime for strained Si/SiGe wafers using transient capacitance method. 2148-2150. Paper presented at 2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004, Beijing, China.