Fabrication of Ge-MOS capacitors with high quality interface by ultra-thin SiO2/GeO2 bi-layer passivation combined with the subsequent SiO2-depositions using magnetron sputtering

Kana Hirayama, Keisuke Yoshino, Ryuji Ueno, Yoshiaki Iwamura, Haigui Yang, Dong Wang, Hiroshi Nakashima

Research output: Contribution to journalArticlepeer-review

22 Citations (Scopus)

Abstract

Ge-MOS capacitors were fabricated by a novel method of ultra-thin SiO 2/GeO2 bi-layer passivation (BLP) for Ge surface combined with the subsequent SiO2-depositions using magnetron sputtering. For the Ge-MOS capacitors fabricated by BLP with O2, to decrease oxygen content in the subsequent SiO2 deposition is helpful for improving interface quality. By optimizing process parameters of the Ge surface thermal cleaning, the BLP, and the subsequent SiO2 deposition, interface states density of 4 × 1011 cm-2 eV-1 at around mid-gap was achieved, which is approximately three times smaller than that of non-passavited Ge-MOS capacitors. On the contrary, for the Ge-MOS capacitors fabricated by BLP without O2, interface quality could be improved by an increase in oxygen contents during the subsequent SiO2 deposition, but the interface quality was worse compared with BLP with O 2.

Original languageEnglish
Pages (from-to)122-127
Number of pages6
JournalSolid-State Electronics
Volume60
Issue number1
DOIs
Publication statusPublished - Jun 2011

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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