### Abstract

This paper proposes fast parallel link-disjoint path algorithm using dynamically reconfigurable processor and implements it on DAPDNA-2 (IPFlex Inc) which is newly structured. The conventional k-shortest path algorithm finds multiple link-disjoint paths between the source node and the destination node. When the network scale is large, the calculation time of k-shortest path algorithm increases rapidly. Moreover, in the worst case, k-shortest path algorithm can not find optimum link-disjoint path pair because this algorithm always finds the shortest path at first and removes those links from network. Our proposed algorithm collects all path information in the network and calculates optimum linkdisjoint path pair (i.e. minimum cost link-disjoint path pair) at high speed by using parallel operation. Additionally, our proposed algorithm finds optimum link-disjoint path pair at a high rate in a limited of calculation time. The evaluation shows our proposed algorithm can decrease the calculation clock about 90%. copyright

Original language | English |
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Title of host publication | 2008 14th Asia-Pacific Conference on Communications, APCC 2008 |

Publication status | Published - Dec 1 2008 |

Externally published | Yes |

Event | 2008 14th Asia-Pacific Conference on Communications, APCC 2008 - Akihabara, Tokyo, United States Duration: Oct 14 2008 → Oct 16 2008 |

### Publication series

Name | 2008 14th Asia-Pacific Conference on Communications, APCC 2008 |
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### Other

Other | 2008 14th Asia-Pacific Conference on Communications, APCC 2008 |
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Country | United States |

City | Akihabara, Tokyo |

Period | 10/14/08 → 10/16/08 |

### All Science Journal Classification (ASJC) codes

- Computer Networks and Communications
- Communication

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## Cite this

*2008 14th Asia-Pacific Conference on Communications, APCC 2008*[4773784] (2008 14th Asia-Pacific Conference on Communications, APCC 2008).