FPGA-targeted hardware implementations of K2

Shinsaku Kiyomoto, Toshiaki Tanaka, Kouichi Sakurai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

K2 is a new type of word oriented stream cipher that has dynamic feedback control. Existing research has shown that K2 v2.0 is a high performance stream cipher in software implementations and can be used in several applications. However, no evaluation results for its performance in hardware implementations have been published. In this paper, we presented two hardware implementations of K2 v2.0: a high speed implementation and a compact implementation. We then show the evaluation results on FPGA implementation simulations. The implementations of K2 demonstrated high efficiency compared with other stream ciphers, with K2 being 4-10 times higher than AES implementations. We think that the FPGA implementation of K2 is suitable for applications using high speed encryption/decryption.

Original languageEnglish
Title of host publicationSECRYPT 2008 - International Conference on Security and Cryptography, Proceedings
Pages270-277
Number of pages8
Publication statusPublished - Dec 1 2008
EventInternational Conference on Security and Cryptography, SECRYPT 2008 - Porto, Portugal
Duration: Jul 26 2008Jul 29 2008

Publication series

NameSECRYPT 2008 - International Conference on Security and Cryptography, Proceedings

Other

OtherInternational Conference on Security and Cryptography, SECRYPT 2008
CountryPortugal
CityPorto
Period7/26/087/29/08

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All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Information Systems
  • Software
  • Control and Systems Engineering

Cite this

Kiyomoto, S., Tanaka, T., & Sakurai, K. (2008). FPGA-targeted hardware implementations of K2. In SECRYPT 2008 - International Conference on Security and Cryptography, Proceedings (pp. 270-277). (SECRYPT 2008 - International Conference on Security and Cryptography, Proceedings).