Functional memory type parallel processor architecture for solving combinational problems

Hiroto Yasuura, Taizou Tsujimoto, Keikichi Tamaru

Research output: Contribution to journalArticle

Abstract

We propose a new parallel processor architecture which is suitable for use with current VLSI technology. We term this architecture FMPP (Functional Memory type Parallel Processor architecture). The integration density of this architecture can be increased in accordance with the regular nature of its structure in a manner similar to memory chips. We regard the simple logic function equivalent to the roughly 100 transistors of each RAM word added, as a l-word bit serial processor. We take the memory to be an SIMD parallel computer system consisting of simple processors for many numbers as there are RAM words. This architecture implements a simple parallel algorithm for solving several combinational problems and combinational optimization problems. We call this algorithm a parallel exhaustive search (PRE).

Original languageEnglish
Pages (from-to)23-31
Number of pages9
JournalElectronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)
Volume73
Issue number1
Publication statusPublished - Jan 1990
Externally publishedYes

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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