Gate stack and source/drain junction formations for high-mobility Ge MOSFETs

Hiroshi Nakashima; Keisuke Yamamoto; Haigui Yang; Dong Wang

doi:10.1149/05009.0205ecst

Gate stack and source/drain junction formations for high-mobility Ge MOSFETs

Hiroshi Nakashima, Keisuke Yamamoto, Haigui Yang, Dong Wang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

Ge is of great interest as a candidate channel material for future CMOS devices due to its high intrinsic carrier mobility. To translate this potential into CMOS, high-quality gate-stack and source/drain (S/D) junction formations are essential. We fabricated Ge n- and p-MOSFETs using the gate-stack formation by bilayer (SiO₂/GeO₂) passivation and using S/D junction formations by thermal diffusion of P and ion implantation of B. The electron and hole channel mobilities of the fabricated MOSFETs were 1097 and 376 cm ²V^-1s^-1, respectively, despite the very thin GeO2 thickness. We will present the detailed fabrication method and device performance.

Original language	English
Title of host publication	SiGe, Ge, and Related Compounds 5
Subtitle of host publication	Materials, Processing, and Devices
Publisher	Electrochemical Society Inc.
Pages	205-216
Number of pages	12
Edition	9
ISBN (Print)	9781607683575
DOIs	https://doi.org/10.1149/05009.0205ecst
Publication status	Published - 2013
Event	5th SiGe, Ge, and Related Compounds: Materials, Processing and Devices Symposium - 220th ECS Meeting - Honolulu, HI, United States Duration: Oct 7 2012 → Oct 12 2012

Publication series

Name	ECS Transactions
Number	9
Volume	50
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Other

Other	5th SiGe, Ge, and Related Compounds: Materials, Processing and Devices Symposium - 220th ECS Meeting
Country/Territory	United States
City	Honolulu, HI
Period	10/7/12 → 10/12/12

All Science Journal Classification (ASJC) codes

Engineering(all)

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10.1149/05009.0205ecst

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Gate stack and source/drain junction formations for high-mobility Ge MOSFETs. / Nakashima, Hiroshi; Yamamoto, Keisuke; Yang, Haigui et al.

SiGe, Ge, and Related Compounds 5: Materials, Processing, and Devices. 9. ed. Electrochemical Society Inc., 2013. p. 205-216 (ECS Transactions; Vol. 50, No. 9).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nakashima, H, Yamamoto, K, Yang, H & Wang, D 2013, Gate stack and source/drain junction formations for high-mobility Ge MOSFETs. in SiGe, Ge, and Related Compounds 5: Materials, Processing, and Devices. 9 edn, ECS Transactions, no. 9, vol. 50, Electrochemical Society Inc., pp. 205-216, 5th SiGe, Ge, and Related Compounds: Materials, Processing and Devices Symposium - 220th ECS Meeting, Honolulu, HI, United States, 10/7/12. https://doi.org/10.1149/05009.0205ecst

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abstract = "Ge is of great interest as a candidate channel material for future CMOS devices due to its high intrinsic carrier mobility. To translate this potential into CMOS, high-quality gate-stack and source/drain (S/D) junction formations are essential. We fabricated Ge n- and p-MOSFETs using the gate-stack formation by bilayer (SiO2/GeO2) passivation and using S/D junction formations by thermal diffusion of P and ion implantation of B. The electron and hole channel mobilities of the fabricated MOSFETs were 1097 and 376 cm 2V-1s-1, respectively, despite the very thin GeO2 thickness. We will present the detailed fabrication method and device performance.",

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AB - Ge is of great interest as a candidate channel material for future CMOS devices due to its high intrinsic carrier mobility. To translate this potential into CMOS, high-quality gate-stack and source/drain (S/D) junction formations are essential. We fabricated Ge n- and p-MOSFETs using the gate-stack formation by bilayer (SiO2/GeO2) passivation and using S/D junction formations by thermal diffusion of P and ion implantation of B. The electron and hole channel mobilities of the fabricated MOSFETs were 1097 and 376 cm 2V-1s-1, respectively, despite the very thin GeO2 thickness. We will present the detailed fabrication method and device performance.

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Gate stack and source/drain junction formations for high-mobility Ge MOSFETs

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