Gated Si field emitter array prepared by using anodization

Katsuya Higa, Kiyoaki Nishii, Tanemasa Asano

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

High aspect-ratio gated field emitter arrays have been fabricated using silicon tip prepared by the anodization of a silicon wafer with periodic nip junctions. The tips were formed by the preferential growth of porous silicon in p-type material and were transferred to a separate silicon substrate by direct bonding. Gate electrodes were then formed by depositing a WSi2 film over the tips, and apertures were subsequently created by etching with an argon milling process. The resulting gated tip arrays demonstrated field emission, although higher than usual gate voltages were required.

Original languageEnglish
Pages (from-to)651-653
Number of pages3
JournalJournal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Volume16
Issue number2
Publication statusPublished - Mar 1998
Externally publishedYes

Fingerprint

emitters
Silicon
Porous silicon
Silicon wafers
Field emission
Argon
Aspect ratio
Etching
silicon
Electrodes
Electric potential
Substrates
high aspect ratio
porous silicon
field emission
apertures
argon
etching
wafers
electrodes

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)
  • Surfaces and Interfaces

Cite this

Gated Si field emitter array prepared by using anodization. / Higa, Katsuya; Nishii, Kiyoaki; Asano, Tanemasa.

In: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, Vol. 16, No. 2, 03.1998, p. 651-653.

Research output: Contribution to journalArticle

Higa, Katsuya ; Nishii, Kiyoaki ; Asano, Tanemasa. / Gated Si field emitter array prepared by using anodization. In: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 1998 ; Vol. 16, No. 2. pp. 651-653.
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