Generating and executing multi-exit custom instructions for an adaptive extensible processor

Hamid Noon, Farhad Mehdipour, Kazuaki Murakami, Koji Inoue, Maziar Goudarzi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

To improve the performance of embedded processors, an effective technique is collapsing critical computation subgraphs as application-specific instruction set extensions and executing them on custom functional units. The problems of this approach are immense cost and long time of designing. To address these issues, we propose an adaptive extensible processor in which custom instructions (CIs) are generated and added after chip-fabrication. To support this feature, custom functional units are replaced by a reconfigurable matrix of functional units with the capability of conditional execution. Unlike previous proposed CIs, ours can include multiple exits. Experimental results show that multi-exit CIs enhance the performance by 46% in average compared to CIs limited to one basic block. A maximum speedup of 2.89 compared to a 4-issue in-order RISC processor, and a speedup of 1.66 in average, was achieved on MiBench benchmark suite.

Original languageEnglish
Title of host publicationProceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007
Pages325-330
Number of pages6
DOIs
Publication statusPublished - 2007
Event2007 Design, Automation and Test in Europe Conference and Exhibition - Nice Acropolis, France
Duration: Apr 16 2007Apr 20 2007

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other2007 Design, Automation and Test in Europe Conference and Exhibition
CountryFrance
CityNice Acropolis
Period4/16/074/20/07

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Noon, H., Mehdipour, F., Murakami, K., Inoue, K., & Goudarzi, M. (2007). Generating and executing multi-exit custom instructions for an adaptive extensible processor. In Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007 (pp. 325-330). [4211817] (Proceedings -Design, Automation and Test in Europe, DATE). https://doi.org/10.1109/DATE.2007.364612