Hardware-assisted scalable flow control of shared receive queue

Teruo Tanimoto; Takatsugu Ono; Kohta Nakashima; Takashi Miyoshi

doi:10.1145/2597652.2600113

Hardware-assisted scalable flow control of shared receive queue

Teruo Tanimoto, Takatsugu Ono, Kohta Nakashima, Takashi Miyoshi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.

Original language	English
Title of host publication	ICS 2014 - Proceedings of the 28th ACM International Conference on Supercomputing
Publisher	Association for Computing Machinery
Number of pages	1
ISBN (Print)	9781450326421
DOIs	https://doi.org/10.1145/2597652.2600113
Publication status	Published - Jan 1 2014
Externally published	Yes
Event	28th ACM International Conference on Supercomputing, ICS 2014 - Munich, Germany Duration: Jun 10 2014 → Jun 13 2014

Other

Other	28th ACM International Conference on Supercomputing, ICS 2014
Country/Territory	Germany
City	Munich
Period	6/10/14 → 6/13/14

All Science Journal Classification (ASJC) codes

Computer Science(all)

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10.1145/2597652.2600113

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title = "Hardware-assisted scalable flow control of shared receive queue",

abstract = "The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.",

author = "Teruo Tanimoto and Takatsugu Ono and Kohta Nakashima and Takashi Miyoshi",

year = "2014",

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AU - Nakashima, Kohta

AU - Miyoshi, Takashi

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Y1 - 2014/1/1

N2 - The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.

AB - The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.

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M3 - Conference contribution

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PB - Association for Computing Machinery

T2 - 28th ACM International Conference on Supercomputing, ICS 2014

Y2 - 10 June 2014 through 13 June 2014

ER -

Hardware-assisted scalable flow control of shared receive queue

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