Abstract
The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.
| Original language | English |
|---|---|
| Title of host publication | ICS 2014 - Proceedings of the 28th ACM International Conference on Supercomputing |
| Publisher | Association for Computing Machinery |
| Number of pages | 1 |
| ISBN (Print) | 9781450326421 |
| DOIs | |
| Publication status | Published - Jan 1 2014 |
| Externally published | Yes |
| Event | 28th ACM International Conference on Supercomputing, ICS 2014 - Munich, Germany Duration: Jun 10 2014 → Jun 13 2014 |
Other
| Other | 28th ACM International Conference on Supercomputing, ICS 2014 |
|---|---|
| Country | Germany |
| City | Munich |
| Period | 6/10/14 → 6/13/14 |
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All Science Journal Classification (ASJC) codes
- Computer Science(all)
Cite this
Hardware-assisted scalable flow control of shared receive queue. / Tanimoto, Teruo; Ono, Takatsugu; Nakashima, Kohta; Miyoshi, Takashi.
ICS 2014 - Proceedings of the 28th ACM International Conference on Supercomputing. Association for Computing Machinery, 2014.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Hardware-assisted scalable flow control of shared receive queue
AU - Tanimoto, Teruo
AU - Ono, Takatsugu
AU - Nakashima, Kohta
AU - Miyoshi, Takashi
PY - 2014/1/1
Y1 - 2014/1/1
N2 - The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.
AB - The total number of processor cores in supercomputers is increasing while memory size per core is decreasing due to the adoption of processors with multiple cores. Shared Receive Queue is a technique that effectively reduces the memory usage of buffers, but the absence of flow control results in excess buffer pools. We propose a hardware-assisted flow control that reduces flow control latency by 95.1%, thus enabling scalable supercomputers with multi-core processors.
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UR - http://www.scopus.com/inward/citedby.url?scp=84903775271&partnerID=8YFLogxK
U2 - 10.1145/2597652.2600113
DO - 10.1145/2597652.2600113
M3 - Conference contribution
AN - SCOPUS:84903775271
SN - 9781450326421
BT - ICS 2014 - Proceedings of the 28th ACM International Conference on Supercomputing
PB - Association for Computing Machinery
ER -