Discrimination between earthquakes and explosion is one of the main challenges in the field of seismology. In some cases, the explosions recorded as an earthquake or vice verse, which can contaminate the seismic catalog. Rapid discrimination is required to support the real-time seismic application. The discrimination algorithm is based on a wavelet filter bank to extract the discriminative features, and support vector machine (SVM) as a classifier. Therefore; we propose to optimize the hardware implementation of the discrimination algorithm on Field Programmable Gate Array (FPGA). First, we implement the wavelet filter bank using optimized lifting scheme. Then, we utilize the linear classifier to implement the SVM classifier. Finally, we optimize the hardware resources of the discrimination algorithm to be utilized on low-cost FPGA called TE0711 board (Xilinx Artix7). The implemented design is utilized 1.2% and 39.8% of the FPGA's Look Up Table (LUT) and register resources, respectively.