High-performance Ge metal-oxide-semiconductor field-effect transistors with a gate stack fabricated by ultrathin SiO2/GeO2 bilayer passivation

Keisuke Yamamoto, Ryuji Ueno, Takeshi Yamanaka, Kana Hirayama, Haigui Yang, Dong Wang, Hiroshi Nakashima

Research output: Contribution to journalArticlepeer-review

32 Citations (Scopus)

Abstract

We fabricated Ge n-and p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with (100) surface orientation by the gate-last process. The source/drain junctions for n-and p-MOSFETs were fabricated by thermal diffusion of P and ion implantation of B, respectively, which indicated high on/off ratios. An ultrathin SiO2/GeO2 interlayer was used for fabricating the gate stack. The fabricated MOSFETs showed excellent electrical characteristics with a low interface state density. The peak electron and hole mobilities were 1097 and 376 cm2 V-1 s -1, respectively, despite the very thin GeO2 thickness (2 nm). These are 1.5-1.6 times higher than those of Si MOSFETs.

Original languageEnglish
JournalApplied Physics Express
Volume4
Issue number5
DOIs
Publication statusPublished - May 2011

All Science Journal Classification (ASJC) codes

  • Engineering(all)
  • Physics and Astronomy(all)

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