Hole-mobility enhancement in ultrathin strained Si0.5Ge 0.5-on-insulator fabricated by Ge condensation technique

Haigui Yang; Dong Wang; Hiroshi Nakashima

doi:10.1109/ICSICT.2010.5667472

Hole-mobility enhancement in ultrathin strained Si_0.5Ge _0.5-on-insulator fabricated by Ge condensation technique

Haigui Yang, Dong Wang, Hiroshi Nakashima

Energy Engineering Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Ultrathin (11 nm) strained SiGe-on-insulator (SGOI) with a Ge fraction of 0.5 was fabricated by Ge condensation technique. The residual compressive strain as high as 1.72% was achieved in SGOI layer by reducing the initial thickness of as-grown Si_0.93Ge_0.07 layer. Strained-SGOI pMOSFET exhibits a hole mobility of 3 times higher than that of Si-on-insulator pMOSFET.

Original language	English
Title of host publication	ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
Pages	905-907
Number of pages	3
DOIs	https://doi.org/10.1109/ICSICT.2010.5667472
Publication status	Published - Dec 1 2010
Event	2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China Duration: Nov 1 2010 → Nov 4 2010

Publication series

Name	ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Other

Other	2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
Country	China
City	Shanghai
Period	11/1/10 → 11/4/10

Fingerprint

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Cite this

Yang, H., Wang, D., & Nakashima, H. (2010). Hole-mobility enhancement in ultrathin strained Si_0.5Ge _0.5-on-insulator fabricated by Ge condensation technique. In ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings (pp. 905-907). [5667472] (ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2010.5667472

Hole-mobility enhancement in ultrathin strained Si_0.5Ge _0.5-on-insulator fabricated by Ge condensation technique. / Yang, Haigui; Wang, Dong ; Nakashima, Hiroshi.

ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2010. p. 905-907 5667472 (ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yang, H, Wang, D & Nakashima, H 2010, Hole-mobility enhancement in ultrathin strained Si_0.5Ge _0.5-on-insulator fabricated by Ge condensation technique. in ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings., 5667472, ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings, pp. 905-907, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, China, 11/1/10. https://doi.org/10.1109/ICSICT.2010.5667472

Yang H, Wang D , Nakashima H. Hole-mobility enhancement in ultrathin strained Si_0.5Ge _0.5-on-insulator fabricated by Ge condensation technique. In ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2010. p. 905-907. 5667472. (ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2010.5667472

Yang, Haigui ; Wang, Dong ; Nakashima, Hiroshi. / Hole-mobility enhancement in ultrathin strained Si_0.5Ge _0.5-on-insulator fabricated by Ge condensation technique. ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2010. pp. 905-907 (ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

@inproceedings{a1305fa550b0483097b501a969a33f65,

title = "Hole-mobility enhancement in ultrathin strained Si0.5Ge 0.5-on-insulator fabricated by Ge condensation technique",

abstract = "Ultrathin (11 nm) strained SiGe-on-insulator (SGOI) with a Ge fraction of 0.5 was fabricated by Ge condensation technique. The residual compressive strain as high as 1.72{\%} was achieved in SGOI layer by reducing the initial thickness of as-grown Si0.93Ge0.07 layer. Strained-SGOI pMOSFET exhibits a hole mobility of 3 times higher than that of Si-on-insulator pMOSFET.",

author = "Haigui Yang and Dong Wang and Hiroshi Nakashima",

year = "2010",

month = "12",

day = "1",

doi = "10.1109/ICSICT.2010.5667472",

language = "English",

isbn = "9781424457984",

series = "ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

pages = "905--907",

booktitle = "ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

}

TY - GEN

T1 - Hole-mobility enhancement in ultrathin strained Si0.5Ge 0.5-on-insulator fabricated by Ge condensation technique

AU - Yang, Haigui

AU - Wang, Dong

AU - Nakashima, Hiroshi

PY - 2010/12/1

Y1 - 2010/12/1

N2 - Ultrathin (11 nm) strained SiGe-on-insulator (SGOI) with a Ge fraction of 0.5 was fabricated by Ge condensation technique. The residual compressive strain as high as 1.72% was achieved in SGOI layer by reducing the initial thickness of as-grown Si0.93Ge0.07 layer. Strained-SGOI pMOSFET exhibits a hole mobility of 3 times higher than that of Si-on-insulator pMOSFET.

AB - Ultrathin (11 nm) strained SiGe-on-insulator (SGOI) with a Ge fraction of 0.5 was fabricated by Ge condensation technique. The residual compressive strain as high as 1.72% was achieved in SGOI layer by reducing the initial thickness of as-grown Si0.93Ge0.07 layer. Strained-SGOI pMOSFET exhibits a hole mobility of 3 times higher than that of Si-on-insulator pMOSFET.

UR - http://www.scopus.com/inward/record.url?scp=78751493040&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=78751493040&partnerID=8YFLogxK

U2 - 10.1109/ICSICT.2010.5667472

DO - 10.1109/ICSICT.2010.5667472

M3 - Conference contribution

AN - SCOPUS:78751493040

SN - 9781424457984

T3 - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

SP - 905

EP - 907

BT - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

ER -

Access to Document

10.1109/ICSICT.2010.5667472