Hole-mobility enhancement in ultrathin strained Si0.5Ge 0.5-on-insulator fabricated by Ge condensation technique

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Ultrathin (11 nm) strained SiGe-on-insulator (SGOI) with a Ge fraction of 0.5 was fabricated by Ge condensation technique. The residual compressive strain as high as 1.72% was achieved in SGOI layer by reducing the initial thickness of as-grown Si0.93Ge0.07 layer. Strained-SGOI pMOSFET exhibits a hole mobility of 3 times higher than that of Si-on-insulator pMOSFET.

Original languageEnglish
Title of host publicationICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
Pages905-907
Number of pages3
DOIs
Publication statusPublished - Dec 1 2010
Event2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China
Duration: Nov 1 2010Nov 4 2010

Publication series

NameICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Other

Other2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
CountryChina
CityShanghai
Period11/1/1011/4/10

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All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Yang, H., Wang, D., & Nakashima, H. (2010). Hole-mobility enhancement in ultrathin strained Si0.5Ge 0.5-on-insulator fabricated by Ge condensation technique. In ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings (pp. 905-907). [5667472] (ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2010.5667472