TY - JOUR
T1 - Impact of the Angle of Incidence on Negative Muon-Induced SEU Cross Sections of 65-nm Bulk and FDSOI SRAMs
AU - Liao, Wang
AU - Hashimoto, Masanori
AU - Manabe, Seiya
AU - Watanabe, Yukinobu
AU - Abe, Shin Ichiro
AU - Tampo, Motonobu
AU - Takeshita, Soshi
AU - Miyake, Yasuhiro
N1 - Funding Information:
Manuscript received October 9, 2019; revised November 17, 2019 and January 3, 2020; accepted January 25, 2020. Date of publication February 24, 2020; date of current version July 16, 2020. This work was supported in part by Grant-in-Aid for Scientific Research (B) and (S) from the Japan Society for the Promotion of Science under Grant JP16H03906 and Grant JP19H05664 and in part by Japan Science and Technology Agency-Program on Open Innovation Platform with Enterprises, Research Institute and Academia (JST-OPERA Program), Japan, under Grant JPMJOP1721.
PY - 2020/7
Y1 - 2020/7
N2 - Muon-induced single event upset (SEU) is predicted to increase with technology scaling. Although previous works investigated the dependencies of muon-induced SEU cross sections on energy, voltage, and technology, the angle of incidence of terrestrial muons is not always perpendicular to the chip surface. Consequently, the impact of the angle of incidence of muons on SEUs should be evaluated. This study conducts negative muon irradiation tests on bulk and fully depleted silicon on insulator static random access memories at two angles of incidence: 0° (vertical) and 45° (tilted). The tilted incidence drifts the muon energy peak to a higher energy as expected. However, the SEU characteristics in the bulk device between the vertical and tilted incidences, including the voltage dependences of the SEU cross sections and multiple cells upset patterns, are similar despite the unexpected impact on the SEU cross section at an operating voltage of 0.4 V.
AB - Muon-induced single event upset (SEU) is predicted to increase with technology scaling. Although previous works investigated the dependencies of muon-induced SEU cross sections on energy, voltage, and technology, the angle of incidence of terrestrial muons is not always perpendicular to the chip surface. Consequently, the impact of the angle of incidence of muons on SEUs should be evaluated. This study conducts negative muon irradiation tests on bulk and fully depleted silicon on insulator static random access memories at two angles of incidence: 0° (vertical) and 45° (tilted). The tilted incidence drifts the muon energy peak to a higher energy as expected. However, the SEU characteristics in the bulk device between the vertical and tilted incidences, including the voltage dependences of the SEU cross sections and multiple cells upset patterns, are similar despite the unexpected impact on the SEU cross section at an operating voltage of 0.4 V.
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U2 - 10.1109/TNS.2020.2976125
DO - 10.1109/TNS.2020.2976125
M3 - Article
AN - SCOPUS:85088860242
VL - 67
SP - 1566
EP - 1572
JO - IEEE Transactions on Nuclear Science
JF - IEEE Transactions on Nuclear Science
SN - 0018-9499
IS - 7
M1 - 9007746
ER -