Improved policies for Drowsy caches in embedded processors

Junpei Zushi, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Inoue Koji

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

In the design of embedded systems, especially batterypowered systems, it is important to reduce energy consumption. Cache are now used not only in general-purpose processors but also in embedded processors. As feature sizes shrink, the leakage energy has contributed to a significant portion of total energy consumption. To reduce the leakage energy of cache, the Drowsy cache was proposed, in which the cache lines are periodically moved to the lowleakage mode without loss of its content. However, when a cache line in the low-leakage mode is accessed, one or more clock cycles are required to transition the cache line back to the normal mode before its content can be accessed. As a result, these penalty cycles may significantly degrade the cache performance, especially in embedded processors without out-of-order execution. In this paper, we propose four mode transition policies which aim at high energy reduction with the minimum performance degradation. We also compare our policies with existing policies in the context of embedded processors. Experimental results demonstrate the effectiveness of the proposed policies.

Original languageEnglish
Title of host publicationProceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008
Pages362-367
Number of pages6
DOIs
Publication statusPublished - Sep 5 2008
Event4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008 - Hong Kong, SAR, Hong Kong
Duration: Jan 23 2008Jan 25 2008

Publication series

NameProceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008

Other

Other4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008
CountryHong Kong
CityHong Kong, SAR
Period1/23/081/25/08

Fingerprint

Energy utilization
Embedded systems
Clocks
Degradation

All Science Journal Classification (ASJC) codes

  • Computer Graphics and Computer-Aided Design
  • Computer Science Applications
  • Electrical and Electronic Engineering

Cite this

Zushi, J., Zeng, G., Tomiyama, H., Takada, H., & Koji, I. (2008). Improved policies for Drowsy caches in embedded processors. In Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008 (pp. 362-367). [4459572] (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008). https://doi.org/10.1109/DELTA.2008.70

Improved policies for Drowsy caches in embedded processors. / Zushi, Junpei; Zeng, Gang; Tomiyama, Hiroyuki; Takada, Hiroaki; Koji, Inoue.

Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008. 2008. p. 362-367 4459572 (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zushi, J, Zeng, G, Tomiyama, H, Takada, H & Koji, I 2008, Improved policies for Drowsy caches in embedded processors. in Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008., 4459572, Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, pp. 362-367, 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, SAR, Hong Kong, 1/23/08. https://doi.org/10.1109/DELTA.2008.70
Zushi J, Zeng G, Tomiyama H, Takada H, Koji I. Improved policies for Drowsy caches in embedded processors. In Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008. 2008. p. 362-367. 4459572. (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008). https://doi.org/10.1109/DELTA.2008.70
Zushi, Junpei ; Zeng, Gang ; Tomiyama, Hiroyuki ; Takada, Hiroaki ; Koji, Inoue. / Improved policies for Drowsy caches in embedded processors. Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008. 2008. pp. 362-367 (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008).
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