Improving energy efficiency of configurable caches via temperature-aware configuration selection

Hamid Noori, Maziar Goudarzi, Inoue Koji, Kazuaki Murakami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of digital systems continues to grow. Temperature is another factor that exponentially increases the leakage current. In this paper, we show the effect of temperature on the optimal (minimum-energy-consuming) cache configuration for low energy embedded systems. Our results show that for a given application and technology, the optimal cache size moves toward smaller caches at higher temperatures, due to the larger leakage. Our results show that using a Temperature-Aware Configurable Cache (TACC), up to 61% energy can be saved for instruction cache and 77% for data cache compared to a configurable cache that has been configured for only the corner case temperature (100°C). The TACC also enhances the performance by up to 28% and 17% for the instruction and data cache, respectively.

Original languageEnglish
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationTrends in VLSI Technology and Design, ISVLSI 2008
Pages363-368
Number of pages6
DOIs
Publication statusPublished - Sep 22 2008
EventIEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008 - Montpellier, France
Duration: Apr 7 2008Apr 9 2008

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Other

OtherIEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008
CountryFrance
CityMontpellier
Period4/7/084/9/08

Fingerprint

Energy efficiency
Temperature
Embedded systems
Leakage currents
Energy dissipation
Electric power utilization

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Noori, H., Goudarzi, M., Koji, I., & Murakami, K. (2008). Improving energy efficiency of configurable caches via temperature-aware configuration selection. In Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008 (pp. 363-368). [4556822] (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008). https://doi.org/10.1109/ISVLSI.2008.24

Improving energy efficiency of configurable caches via temperature-aware configuration selection. / Noori, Hamid; Goudarzi, Maziar; Koji, Inoue; Murakami, Kazuaki.

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008. 2008. p. 363-368 4556822 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Noori, H, Goudarzi, M, Koji, I & Murakami, K 2008, Improving energy efficiency of configurable caches via temperature-aware configuration selection. in Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008., 4556822, Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008, pp. 363-368, IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008, Montpellier, France, 4/7/08. https://doi.org/10.1109/ISVLSI.2008.24
Noori H, Goudarzi M, Koji I, Murakami K. Improving energy efficiency of configurable caches via temperature-aware configuration selection. In Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008. 2008. p. 363-368. 4556822. (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008). https://doi.org/10.1109/ISVLSI.2008.24
Noori, Hamid ; Goudarzi, Maziar ; Koji, Inoue ; Murakami, Kazuaki. / Improving energy efficiency of configurable caches via temperature-aware configuration selection. Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008. 2008. pp. 363-368 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008).
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