Instruction encoding for reducing power consumption of I-ROMs based on execution locality

Inoue Koji, Vasily G. Moshnyaga, Kazuaki Murakami

Research output: Contribution to journalArticle

Abstract

In this paper, we propose an instruction encoding scheme to reduce power consumption of instruction ROMs. The power consumption of the instruction ROM strongly depends on the switching activity of bit-lines due to their large load capacitance. In our approach, the binary-patterns to be assigned as op-codes are determined based on the frequency of instructions in order to reduce the number of bit-line dis-charging. Simulation results show that our approach can reduce 40% of bit-line switchings from a conventional organization.

Original languageEnglish
Pages (from-to)799-805
Number of pages7
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE86-A
Issue number4
Publication statusPublished - Apr 2003
Externally publishedYes

Fingerprint

ROM
Locality
Power Consumption
Encoding
Electric power utilization
Line
Capacitance
Binary
Simulation

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Information Systems

Cite this

Instruction encoding for reducing power consumption of I-ROMs based on execution locality. / Koji, Inoue; Moshnyaga, Vasily G.; Murakami, Kazuaki.

In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E86-A, No. 4, 04.2003, p. 799-805.

Research output: Contribution to journalArticle

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