Instruction scheduling for power reduction in processor-based system design

Hiroyuki Tomiyama; Tohru Ishihara; Akihiko Inoue; Hiroto Yasuura

doi:10.1109/DATE.1998.655958

Instruction scheduling for power reduction in processor-based system design

Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura

Trustee(Vice President)

Research output: Contribution to journal › Conference article › peer-review

11 Citations (Scopus)

Abstract

This paper proposes an instruction scheduling technique to reduce power consumed for off-chip driving. The technique minimizes the switching activity of a data bus between an on-chip cache and a main memory when instruction cache misses occur. The scheduling problem is formulated and a scheduling algorithm is also presented. Experimental results demonstrate the effectiveness and the efficiency of the proposed algorithm.

Original language	English
Article number	655958
Pages (from-to)	855-860
Number of pages	6
Journal	Proceedings -Design, Automation and Test in Europe, DATE
DOIs	https://doi.org/10.1109/DATE.1998.655958
Publication status	Published - 1998
Event	Design, Automation and Test in Europe, DATE 1998 - Paris, France Duration: Feb 23 1998 → Feb 26 1998

All Science Journal Classification (ASJC) codes

Engineering(all)

Access to Document

10.1109/DATE.1998.655958

Cite this

@article{72d790978c10463898ae4117da15e7e2,

title = "Instruction scheduling for power reduction in processor-based system design",

abstract = "This paper proposes an instruction scheduling technique to reduce power consumed for off-chip driving. The technique minimizes the switching activity of a data bus between an on-chip cache and a main memory when instruction cache misses occur. The scheduling problem is formulated and a scheduling algorithm is also presented. Experimental results demonstrate the effectiveness and the efficiency of the proposed algorithm.",

author = "Hiroyuki Tomiyama and Tohru Ishihara and Akihiko Inoue and Hiroto Yasuura",

year = "1998",

doi = "10.1109/DATE.1998.655958",

language = "English",

pages = "855--860",

journal = "Proceedings -Design, Automation and Test in Europe, DATE",

issn = "1530-1591",

note = "Design, Automation and Test in Europe, DATE 1998 ; Conference date: 23-02-1998 Through 26-02-1998",

}

TY - JOUR

T1 - Instruction scheduling for power reduction in processor-based system design

AU - Tomiyama, Hiroyuki

AU - Ishihara, Tohru

AU - Inoue, Akihiko

AU - Yasuura, Hiroto

PY - 1998

Y1 - 1998

N2 - This paper proposes an instruction scheduling technique to reduce power consumed for off-chip driving. The technique minimizes the switching activity of a data bus between an on-chip cache and a main memory when instruction cache misses occur. The scheduling problem is formulated and a scheduling algorithm is also presented. Experimental results demonstrate the effectiveness and the efficiency of the proposed algorithm.

AB - This paper proposes an instruction scheduling technique to reduce power consumed for off-chip driving. The technique minimizes the switching activity of a data bus between an on-chip cache and a main memory when instruction cache misses occur. The scheduling problem is formulated and a scheduling algorithm is also presented. Experimental results demonstrate the effectiveness and the efficiency of the proposed algorithm.

UR - http://www.scopus.com/inward/record.url?scp=20444438621&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=20444438621&partnerID=8YFLogxK

U2 - 10.1109/DATE.1998.655958

DO - 10.1109/DATE.1998.655958

M3 - Conference article

AN - SCOPUS:20444438621

SN - 1530-1591

SP - 855

EP - 860

JO - Proceedings -Design, Automation and Test in Europe, DATE

JF - Proceedings -Design, Automation and Test in Europe, DATE

M1 - 655958

T2 - Design, Automation and Test in Europe, DATE 1998

Y2 - 23 February 1998 through 26 February 1998

ER -

Instruction scheduling for power reduction in processor-based system design

Abstract

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this