Low group delay 3.1-10.6 GHz CMOS power amplifier for UWB applications

Rohana Sapawi, Ramesh K. Pokharel, Sohiful A.Z. Murad, Awinash Anand, Nishal Koirala, H. Kanaya, K. Yoshida

Research output: Contribution to journalArticle

29 Citations (Scopus)

Abstract

This letter proposes the design of a low group delay ultra-wideband (UWB) power amplifier (PA) in 0.18μm CMOS technology. The PA design employs a three-stage cascade common source topology that has a different design concept from other multi-stage topology to provide a broad bandwidth characteristic, gain flatness of 11.48 ± 0.6dB, and low group delay variation of ± 85.8 ps. A resistive shunt feedback technique is adopted at the first stage of the amplifier to achieve good input matching, which controls the upper frequency of the UWB system. The third stage realizes the gain at the lower corner frequency and the second stage is used to smooth the flatness of the gain curve. By using this method, the proposed design has the lowest group delay variation among the recently reported CMOS PAs for 3.1 to 10.6 GHz applications.

Original languageEnglish
Article number6108314
Pages (from-to)41-43
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume22
Issue number1
DOIs
Publication statusPublished - Jan 1 2012

All Science Journal Classification (ASJC) codes

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Low group delay 3.1-10.6 GHz CMOS power amplifier for UWB applications'. Together they form a unique fingerprint.

Cite this