Low-loss 60 GHz patterned ground shield CPW transmission line

D. A.A. Mat, R. K. Pokharel, R. Sapawi, H. Kanaya, K. Yoshida

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

This paper describes the slow wave structure design below the metallization plane to reduce dielectric loss of the silicon substrates. Three types of structure, floating strips with shield strip length (SL) = shield strip spacing (SS)=10μm and 5μm, and patterned ground with SL=SS=5μm have been designed for coplanar waveguide (CPW) transmission line using 0.18μm CMOS TSMC technology. These structures act to prevent the penetration of the electric field into the silicon substrate. It shows that at frequency of 60GHz, patterned ground shield resulted lower attenuation loss, approximately 60% lower compare to conventional CPW with the increase of quality factor to 16.006. The patterned structure exhibit the attenuation loss of 0.731dB/mm. The wavelength of the design is 980μm at 60GHz.

Original languageEnglish
Title of host publicationTENCON 2011 - 2011 IEEE Region 10 Conference
Subtitle of host publicationTrends and Development in Converging Technology Towards 2020
Pages1118-1121
Number of pages4
DOIs
Publication statusPublished - Dec 1 2011
Event2011 IEEE Region 10 Conference: Trends and Development in Converging Technology Towards 2020, TENCON 2011 - Bali, Indonesia
Duration: Nov 21 2011Nov 24 2011

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON

Other

Other2011 IEEE Region 10 Conference: Trends and Development in Converging Technology Towards 2020, TENCON 2011
CountryIndonesia
CityBali
Period11/21/1111/24/11

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering

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