Multi-level logic minimization across latch boundaries

Yusuke Matsunaga; Masahiro Fujita; Taeko Kakuda

Multi-level logic minimization across latch boundaries

Yusuke Matsunaga, Masahiro Fujita, Taeko Kakuda

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A method to minimize sequential circuits is presented. It uses permissible functions extended for sequential circuits, and can make use of don't cares derived from network topology. Also, an efficient binary decision diagram (BDD) implementation of the extended permissible functions is presented by introducing edge attributes that indicate time label to the BDD. Circuits including latches can be efficiently minimized with the proposed method.

Original language	English
Title of host publication	1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers
Publisher	Publ by IEEE
Pages	406-409
Number of pages	4
ISBN (Print)	0818620552
Publication status	Published - Dec 1 1990
Externally published	Yes
Event	1990 IEEE International Conference on Computer-Aided Design - ICCAD-90 - Santa Clara, CA, USA Duration: Nov 11 1990 → Nov 15 1990

Publication series

Name	1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers

Other

Other	1990 IEEE International Conference on Computer-Aided Design - ICCAD-90
City	Santa Clara, CA, USA
Period	11/11/90 → 11/15/90

All Science Journal Classification (ASJC) codes

Engineering(all)

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Cite this

Multi-level logic minimization across latch boundaries. / Matsunaga, Yusuke; Fujita, Masahiro; Kakuda, Taeko.

1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. Publ by IEEE, 1990. p. 406-409 (1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Matsunaga, Y, Fujita, M & Kakuda, T 1990, Multi-level logic minimization across latch boundaries. in 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers, Publ by IEEE, pp. 406-409, 1990 IEEE International Conference on Computer-Aided Design - ICCAD-90, Santa Clara, CA, USA, 11/11/90.

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