Nano-lithography free formation of high density Ge-on-insulator network for epitaxial template

Hiroyuki Yokoyama, Kaoru Toko, Taizoh Sadoh, Masanobu Miyao

Research output: Contribution to journalArticle

10 Citations (Scopus)

Abstract

High-quality Ge-on-insulator (GOI) structures are essential for integrating multi-functional devices onto the Si-platform. We develop the nano-lithography free method for single-crystalline GOI networks by combining partial Ge evaporation and rapid-melting growth techniques. This realizes chip size GOI with high Ge coverage fractions (>75), which is crisscrossed with nano-spacing (∼100 nm width). Over-epitaxy of Ge on the GOI network is also examined, which achieves single-crystalline GOI uniform-plane by covering the nano-spacing. This proves the validity of high-density GOI networks as the epitaxial template. This method will facilitate the heterogeneous integration of Ge, III-V semiconductors, and magnetic materials on the Si-platform.

Original languageEnglish
Article number092111
JournalApplied Physics Letters
Volume100
Issue number9
DOIs
Publication statusPublished - Feb 27 2012

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templates
lithography
insulators
platforms
spacing
magnetic materials
epitaxy
coverings
chips
melting
evaporation

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

Cite this

Nano-lithography free formation of high density Ge-on-insulator network for epitaxial template. / Yokoyama, Hiroyuki; Toko, Kaoru; Sadoh, Taizoh; Miyao, Masanobu.

In: Applied Physics Letters, Vol. 100, No. 9, 092111, 27.02.2012.

Research output: Contribution to journalArticle

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