Neutron soft-error simulation for semiconductor memory devices

Yukiya Kawakami, Yoshifumi Yamamoto, Katsuhiko Tanaka, Masami Hane, Yukinobu Watanabe

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Reported here is the development of a neutron induced soft error simulation system for semiconductor memory devices that (1) employs neutron-silicon-nucleus-reaction data, including the most recently available public data (LA150) and data that has been extended from LA150 by means of quantum molecular dynamics (QMD) calculations, and (2) uses 3D device simulations for efficient computation of excess charge collection. Monte Carlo (MC) calculations also help the system achieve fast, accurate calculation of soft error rates (SERs), most notably multiple-bit error (MBE) rates. In an examination of several generations of DRAM chips, the system found that, at low critical charge (Qc; i.e., the minimum charge which "bit-upset" is occurred in a memory cell), light-mass recoil-ions contribute significantly not only to total-SERs but also to MBE rates, and it also showed that MBE rates increase more dramatically with decreasing critical charge values than do total-SER values. This suggests that the design of future low critical-charge memory devices will need to take into account the effect not only of such light ions on SERs but also of critical-charge values on MBE rates.

Original languageEnglish
Pages (from-to)146-152
Number of pages7
JournalNEC Research and Development
Volume43
Issue number2
Publication statusPublished - Apr 1 2002
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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  • Cite this

    Kawakami, Y., Yamamoto, Y., Tanaka, K., Hane, M., & Watanabe, Y. (2002). Neutron soft-error simulation for semiconductor memory devices. NEC Research and Development, 43(2), 146-152.