Optical and electrical evaluations of SiGe layers on insulator fabricated using Ge condensation by dry oxidation

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Abstract

Photoluminescence (PL) and dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) evaluations were performed for SiGe layers on insulator fabricated using Ge condensation by dry oxidation. Defect generation and transformation during the temperature ramp-up process were studied by PL. Band-band transition PL peaks were clearly observed for the as-grown wafers and the peak intensities decreased with an increase in the target temperature (Tt). Defect-related PL signals were observed at around 0.82, 0.88, 0.95, and 1.0 eV, which varied according to Tt and the SiGe thickness. The dependence of defect-related PL on Tt consists with that the defect generation of misfit-dislocation and transformation to stacking-faults with increasing Tt, which was conformed by transmission electron microscopy. After Ge condensation by dry oxidation, four strained Si/SiGe on insulator (SSGOI) wafers having different Ge fractions (Ge%) and Ge condensation temperatures (Tc) were evaluated using PL and dual-MOS DLTS methods. For the sample with Ge% = 20% and Tc = 1200 °C, a broad defect-related PL signal could be observed. Other SSGOI samples showed deep-level-free PL signal in the energy range from 0.77 eV to band gap, implying high wafer qualities. At mid-gap, the interface states densities (Dit) of wafers with Ge% = 15% and 20% were approximately 5 × 1011 and 1 × 1012 cm-2 eV-1, respectively, which were higher than that of Si/buried oxide (BOX) in a Si on insulator wafer. The high Dit of SiGe/BOX was not due to interface roughness but due to the weakness of Ge-O bonds. No deep traps with concentration great than 3 × 1011 cm-3 were detected by dual-MOS DLTS measurement in the energy range of from 0.07 to 0.24 eV above the top of valence band. Based on the PL and dual-MOS DLTS evaluations, wafer quality dependences on Ge condensation parameters were discussed. One-dimensional mappings for SiGe layer crystallinity by band-band PL intensity and Dit by dual-MOS DLTS were also performed from center to edge for all the SSGOI wafers.

Original languageEnglish
Pages (from-to)841-849
Number of pages9
JournalSolid-State Electronics
Volume53
Issue number8
DOIs
Publication statusPublished - Aug 1 2009

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Condensation
Photoluminescence
condensation
insulators
photoluminescence
Oxidation
oxidation
Deep level transient spectroscopy
evaluation
wafers
metal oxide semiconductors
Metals
Defects
defects
spectroscopy
Temperature
Oxides
temperature
oxides
Interface states

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Condensed Matter Physics
  • Electronic, Optical and Magnetic Materials
  • Materials Chemistry

Cite this

@article{4db4901c7c814fad9cf78b7f39797f54,
title = "Optical and electrical evaluations of SiGe layers on insulator fabricated using Ge condensation by dry oxidation",
abstract = "Photoluminescence (PL) and dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) evaluations were performed for SiGe layers on insulator fabricated using Ge condensation by dry oxidation. Defect generation and transformation during the temperature ramp-up process were studied by PL. Band-band transition PL peaks were clearly observed for the as-grown wafers and the peak intensities decreased with an increase in the target temperature (Tt). Defect-related PL signals were observed at around 0.82, 0.88, 0.95, and 1.0 eV, which varied according to Tt and the SiGe thickness. The dependence of defect-related PL on Tt consists with that the defect generation of misfit-dislocation and transformation to stacking-faults with increasing Tt, which was conformed by transmission electron microscopy. After Ge condensation by dry oxidation, four strained Si/SiGe on insulator (SSGOI) wafers having different Ge fractions (Ge{\%}) and Ge condensation temperatures (Tc) were evaluated using PL and dual-MOS DLTS methods. For the sample with Ge{\%} = 20{\%} and Tc = 1200 °C, a broad defect-related PL signal could be observed. Other SSGOI samples showed deep-level-free PL signal in the energy range from 0.77 eV to band gap, implying high wafer qualities. At mid-gap, the interface states densities (Dit) of wafers with Ge{\%} = 15{\%} and 20{\%} were approximately 5 × 1011 and 1 × 1012 cm-2 eV-1, respectively, which were higher than that of Si/buried oxide (BOX) in a Si on insulator wafer. The high Dit of SiGe/BOX was not due to interface roughness but due to the weakness of Ge-O bonds. No deep traps with concentration great than 3 × 1011 cm-3 were detected by dual-MOS DLTS measurement in the energy range of from 0.07 to 0.24 eV above the top of valence band. Based on the PL and dual-MOS DLTS evaluations, wafer quality dependences on Ge condensation parameters were discussed. One-dimensional mappings for SiGe layer crystallinity by band-band PL intensity and Dit by dual-MOS DLTS were also performed from center to edge for all the SSGOI wafers.",
author = "Dong Wang and Hiroshi Nakashima",
year = "2009",
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T1 - Optical and electrical evaluations of SiGe layers on insulator fabricated using Ge condensation by dry oxidation

AU - Wang, Dong

AU - Nakashima, Hiroshi

PY - 2009/8/1

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N2 - Photoluminescence (PL) and dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) evaluations were performed for SiGe layers on insulator fabricated using Ge condensation by dry oxidation. Defect generation and transformation during the temperature ramp-up process were studied by PL. Band-band transition PL peaks were clearly observed for the as-grown wafers and the peak intensities decreased with an increase in the target temperature (Tt). Defect-related PL signals were observed at around 0.82, 0.88, 0.95, and 1.0 eV, which varied according to Tt and the SiGe thickness. The dependence of defect-related PL on Tt consists with that the defect generation of misfit-dislocation and transformation to stacking-faults with increasing Tt, which was conformed by transmission electron microscopy. After Ge condensation by dry oxidation, four strained Si/SiGe on insulator (SSGOI) wafers having different Ge fractions (Ge%) and Ge condensation temperatures (Tc) were evaluated using PL and dual-MOS DLTS methods. For the sample with Ge% = 20% and Tc = 1200 °C, a broad defect-related PL signal could be observed. Other SSGOI samples showed deep-level-free PL signal in the energy range from 0.77 eV to band gap, implying high wafer qualities. At mid-gap, the interface states densities (Dit) of wafers with Ge% = 15% and 20% were approximately 5 × 1011 and 1 × 1012 cm-2 eV-1, respectively, which were higher than that of Si/buried oxide (BOX) in a Si on insulator wafer. The high Dit of SiGe/BOX was not due to interface roughness but due to the weakness of Ge-O bonds. No deep traps with concentration great than 3 × 1011 cm-3 were detected by dual-MOS DLTS measurement in the energy range of from 0.07 to 0.24 eV above the top of valence band. Based on the PL and dual-MOS DLTS evaluations, wafer quality dependences on Ge condensation parameters were discussed. One-dimensional mappings for SiGe layer crystallinity by band-band PL intensity and Dit by dual-MOS DLTS were also performed from center to edge for all the SSGOI wafers.

AB - Photoluminescence (PL) and dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) evaluations were performed for SiGe layers on insulator fabricated using Ge condensation by dry oxidation. Defect generation and transformation during the temperature ramp-up process were studied by PL. Band-band transition PL peaks were clearly observed for the as-grown wafers and the peak intensities decreased with an increase in the target temperature (Tt). Defect-related PL signals were observed at around 0.82, 0.88, 0.95, and 1.0 eV, which varied according to Tt and the SiGe thickness. The dependence of defect-related PL on Tt consists with that the defect generation of misfit-dislocation and transformation to stacking-faults with increasing Tt, which was conformed by transmission electron microscopy. After Ge condensation by dry oxidation, four strained Si/SiGe on insulator (SSGOI) wafers having different Ge fractions (Ge%) and Ge condensation temperatures (Tc) were evaluated using PL and dual-MOS DLTS methods. For the sample with Ge% = 20% and Tc = 1200 °C, a broad defect-related PL signal could be observed. Other SSGOI samples showed deep-level-free PL signal in the energy range from 0.77 eV to band gap, implying high wafer qualities. At mid-gap, the interface states densities (Dit) of wafers with Ge% = 15% and 20% were approximately 5 × 1011 and 1 × 1012 cm-2 eV-1, respectively, which were higher than that of Si/buried oxide (BOX) in a Si on insulator wafer. The high Dit of SiGe/BOX was not due to interface roughness but due to the weakness of Ge-O bonds. No deep traps with concentration great than 3 × 1011 cm-3 were detected by dual-MOS DLTS measurement in the energy range of from 0.07 to 0.24 eV above the top of valence band. Based on the PL and dual-MOS DLTS evaluations, wafer quality dependences on Ge condensation parameters were discussed. One-dimensional mappings for SiGe layer crystallinity by band-band PL intensity and Dit by dual-MOS DLTS were also performed from center to edge for all the SSGOI wafers.

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