Optimal code placement of embedded software for instruction caches

Hiroyuki Tomiyama, Hiroto Yasuura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a new code placement method for embedded software to maximize hit ratios of instruction caches. We formulate the code placement problem as an integer linear programming problem. One of the advantages of our method is that code can be moved beyond boundaries of functions, so that code placement is optimized globally. Experimental results show our method achieves 35% (max 45%) reduction of cache misses.

Original languageEnglish
Title of host publicationProceedings of the 1996 European Conference on Design and Test, EDTC 1996
PublisherAssociation for Computing Machinery, Inc
Pages96-101
Number of pages6
ISBN (Electronic)0818674237, 9780818674235
DOIs
Publication statusPublished - Mar 11 1996
Event1996 European Conference on Design and Test, EDTC 1996 - Paris, France
Duration: Mar 11 1996Mar 14 1996

Publication series

NameProceedings of the 1996 European Conference on Design and Test, EDTC 1996

Other

Other1996 European Conference on Design and Test, EDTC 1996
CountryFrance
CityParis
Period3/11/963/14/96

Fingerprint

Embedded software
Linear programming

All Science Journal Classification (ASJC) codes

  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Tomiyama, H., & Yasuura, H. (1996). Optimal code placement of embedded software for instruction caches. In Proceedings of the 1996 European Conference on Design and Test, EDTC 1996 (pp. 96-101). [494132] (Proceedings of the 1996 European Conference on Design and Test, EDTC 1996). Association for Computing Machinery, Inc. https://doi.org/10.1109/EDTC.1996.494132

Optimal code placement of embedded software for instruction caches. / Tomiyama, Hiroyuki; Yasuura, Hiroto.

Proceedings of the 1996 European Conference on Design and Test, EDTC 1996. Association for Computing Machinery, Inc, 1996. p. 96-101 494132 (Proceedings of the 1996 European Conference on Design and Test, EDTC 1996).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tomiyama, H & Yasuura, H 1996, Optimal code placement of embedded software for instruction caches. in Proceedings of the 1996 European Conference on Design and Test, EDTC 1996., 494132, Proceedings of the 1996 European Conference on Design and Test, EDTC 1996, Association for Computing Machinery, Inc, pp. 96-101, 1996 European Conference on Design and Test, EDTC 1996, Paris, France, 3/11/96. https://doi.org/10.1109/EDTC.1996.494132
Tomiyama H, Yasuura H. Optimal code placement of embedded software for instruction caches. In Proceedings of the 1996 European Conference on Design and Test, EDTC 1996. Association for Computing Machinery, Inc. 1996. p. 96-101. 494132. (Proceedings of the 1996 European Conference on Design and Test, EDTC 1996). https://doi.org/10.1109/EDTC.1996.494132
Tomiyama, Hiroyuki ; Yasuura, Hiroto. / Optimal code placement of embedded software for instruction caches. Proceedings of the 1996 European Conference on Design and Test, EDTC 1996. Association for Computing Machinery, Inc, 1996. pp. 96-101 (Proceedings of the 1996 European Conference on Design and Test, EDTC 1996).
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