TY - JOUR
T1 - Organic nonvolatile memory transistors based on fullerene and an electron-trapping polymer
AU - Dao, Toan Thanh
AU - Matsushima, Toshinori
AU - Murata, Hideyuki
N1 - Funding Information:
The authors thank Prof. Heisuke Sakai (Waseda University) for fruitful discussion. This work was partially supported by a Grant-in-Aid (Grant No. 20241034) and Scientific Research on Innovative Areas “pi-Space” (Grant No. 20108012) from the Ministry of Education, Culture, Sports, Science, and Technology, Japan. T. T. D. gratefully acknowledges financial support by a 322 Scholarship (doctoral course) of the Vietnamese Government.
PY - 2012/11
Y1 - 2012/11
N2 - We report for the first time organic n-type nonvolatile memory transistors based on a fullerene (C60) semiconductor and an electron-trapping polymer, poly(perfluoroalkenyl vinyl ether) (CYTOP). The transistors with a Si++/SiO2/CYTOP/C60/Al structure show good n-type transistor performance with a threshold voltage (Vth) of 2.8 V and an electron mobility of 0.4 cm2 V-1 s-1. Applying gate voltages of 50 or -45 V for about 0.1 s to the devices induces the reversible shifts in their transfer characteristics, which results in a large memory window (ΔVth) of 10 V. A memory on/off ratio of 10 5 at a small reading voltage below 5 V and a retention time greater than 105 s are achieved. The memory effect in the transistor is ascribed to electrons trapped at the CYTOP/SiO2 interface. Because of the use of high-electron-mobility C60, the switching voltages of our memory transistors become significantly lower than those of conventional memory transistors based on pentacene.
AB - We report for the first time organic n-type nonvolatile memory transistors based on a fullerene (C60) semiconductor and an electron-trapping polymer, poly(perfluoroalkenyl vinyl ether) (CYTOP). The transistors with a Si++/SiO2/CYTOP/C60/Al structure show good n-type transistor performance with a threshold voltage (Vth) of 2.8 V and an electron mobility of 0.4 cm2 V-1 s-1. Applying gate voltages of 50 or -45 V for about 0.1 s to the devices induces the reversible shifts in their transfer characteristics, which results in a large memory window (ΔVth) of 10 V. A memory on/off ratio of 10 5 at a small reading voltage below 5 V and a retention time greater than 105 s are achieved. The memory effect in the transistor is ascribed to electrons trapped at the CYTOP/SiO2 interface. Because of the use of high-electron-mobility C60, the switching voltages of our memory transistors become significantly lower than those of conventional memory transistors based on pentacene.
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U2 - 10.1016/j.orgel.2012.07.041
DO - 10.1016/j.orgel.2012.07.041
M3 - Article
AN - SCOPUS:84865646639
SN - 1566-1199
VL - 13
SP - 2709
EP - 2715
JO - Organic Electronics: physics, materials, applications
JF - Organic Electronics: physics, materials, applications
IS - 11
ER -