OTFT device modeling with Verilog-A language including non-linear effects of source/drain contact resistance

Gordon Yip, Shintarou Sugimoto, Reiji Hattori

    Research output: Contribution to journalArticle

    5 Citations (Scopus)

    Abstract

    A device model for Organic Thin-Film Transistors (OTFT) written in Verilog-A, a high-level analog hardware description language (AHDL), is presented. The non-linear contact resistance with respect to gate or drain bias voltage due to Schottky-barrier narrowing at source/drain contacts has been successfully integrated into this model.

    Original languageEnglish
    Pages (from-to)S102-S106
    JournalJournal of the Korean Physical Society
    Volume48
    Issue numberSUPPL. 1
    Publication statusPublished - Jan 1 2006

    All Science Journal Classification (ASJC) codes

    • Physics and Astronomy(all)

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