A device model for Organic Thin-Film Transistors (OTFT) written in Verilog-A, a high-level analog hardware description language (AHDL), is presented. The non-linear contact resistance with respect to gate or drain bias voltage due to Schottky-barrier narrowing at source/drain contacts has been successfully integrated into this model.
|Journal||Journal of the Korean Physical Society|
|Issue number||SUPPL. 1|
|Publication status||Published - Jan 1 2006|
All Science Journal Classification (ASJC) codes
- Physics and Astronomy(all)