### Abstract

The authors propose a simple parallel algorithm design technique for several NP-complete problems called parallel exhaustive search. Algorithms can be implemented on an SIMD (single instruction, multiple data flow) architecture with very simple and regular array structure. Actually, the architecture is realized by a content-addressable memory (CAM). The authors design almost-linear algorithms for several NP-complete problems by this approach and estimate the performance and limitation. The computation time of the parallel algorithm for the knapsack problem using the CAM is evaluated, and it is shown that the parallel algorithm is 100 or 1000 times faster than the sequential algorithms.

Original language | English |
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Title of host publication | Proceedings - IEEE International Symposium on Circuits and Systems |

Publisher | Publ by IEEE |

Pages | 333-336 |

Number of pages | 4 |

ISBN (Print) | 9517212399 |

Publication status | Published - Dec 1 1988 |

Externally published | Yes |

### Publication series

Name | Proceedings - IEEE International Symposium on Circuits and Systems |
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Volume | 1 |

ISSN (Print) | 0271-4310 |

### Fingerprint

### All Science Journal Classification (ASJC) codes

- Electrical and Electronic Engineering

### Cite this

*Proceedings - IEEE International Symposium on Circuits and Systems*(pp. 333-336). (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 1). Publ by IEEE.