Parallelism control scheme in a dataflow architecture

Shigeru Kusakabe; Takahide Hoshide; Rin-Ichiro Taniguchi; Makoto Amamiya

doi:10.1007/3-540-55895-0_478

Parallelism control scheme in a dataflow architecture

Shigeru Kusakabe, Takahide Hoshide, Rin-Ichiro Taniguchi, Makoto Amamiya

Real world robotics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We propose execution control scheme to realize an efficient multi-processing environment in dataflow architecture. With a unified software and hardware mechanism, we can detect states of processes at run time, which are treated as control information. We control the process level parallelism according to the hardware capacity, and virtualize high speed memory in dynamic data-driven computation where context changes in every instruction execution. We apply this scheme to the Datarol architecture, an optimized version of dynamic dataflow architecture, and evaluate them through software simulation.

Original language	English
Title of host publication	Parallel Processing
Subtitle of host publication	CONPAR 1992 ─ VAPP V - 2nd Joint International Conference on Vector and Parallel Processing, Proceedings
Editors	Luc Bouge, Michel Cosnard, Yves Robert, Denis Trystram
Publisher	Springer Verlag
Pages	743-748
Number of pages	6
ISBN (Print)	9783540558958
DOIs	https://doi.org/10.1007/3-540-55895-0_478
Publication status	Published - Jan 1 1992
Event	2nd Joint International Conference on Vector and Parallel Processing, CONPAR 1992 - Lyon, France Duration: Sept 1 1992 → Sept 4 1992

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	634 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	2nd Joint International Conference on Vector and Parallel Processing, CONPAR 1992
Country/Territory	France
City	Lyon
Period	9/1/92 → 9/4/92

All Science Journal Classification (ASJC) codes

Theoretical Computer Science
Computer Science(all)

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10.1007/3-540-55895-0_478

Cite this

Kusakabe, S., Hoshide, T., Taniguchi, R-I., & Amamiya, M. (1992). Parallelism control scheme in a dataflow architecture. In L. Bouge, M. Cosnard, Y. Robert, & D. Trystram (Eds.), Parallel Processing: CONPAR 1992 ─ VAPP V - 2nd Joint International Conference on Vector and Parallel Processing, Proceedings (pp. 743-748). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 634 LNCS). Springer Verlag. https://doi.org/10.1007/3-540-55895-0_478

Parallelism control scheme in a dataflow architecture. / Kusakabe, Shigeru; Hoshide, Takahide; Taniguchi, Rin-Ichiro et al.

Parallel Processing: CONPAR 1992 ─ VAPP V - 2nd Joint International Conference on Vector and Parallel Processing, Proceedings. ed. / Luc Bouge; Michel Cosnard; Yves Robert; Denis Trystram. Springer Verlag, 1992. p. 743-748 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 634 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kusakabe, S, Hoshide, T, Taniguchi, R-I & Amamiya, M 1992, Parallelism control scheme in a dataflow architecture. in L Bouge, M Cosnard, Y Robert & D Trystram (eds), Parallel Processing: CONPAR 1992 ─ VAPP V - 2nd Joint International Conference on Vector and Parallel Processing, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 634 LNCS, Springer Verlag, pp. 743-748, 2nd Joint International Conference on Vector and Parallel Processing, CONPAR 1992, Lyon, France, 9/1/92. https://doi.org/10.1007/3-540-55895-0_478

Kusakabe S, Hoshide T, Taniguchi R-I, Amamiya M. Parallelism control scheme in a dataflow architecture. In Bouge L, Cosnard M, Robert Y, Trystram D, editors, Parallel Processing: CONPAR 1992 ─ VAPP V - 2nd Joint International Conference on Vector and Parallel Processing, Proceedings. Springer Verlag. 1992. p. 743-748. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/3-540-55895-0_478

Kusakabe, Shigeru ; Hoshide, Takahide ; Taniguchi, Rin-Ichiro et al. / Parallelism control scheme in a dataflow architecture. Parallel Processing: CONPAR 1992 ─ VAPP V - 2nd Joint International Conference on Vector and Parallel Processing, Proceedings. editor / Luc Bouge ; Michel Cosnard ; Yves Robert ; Denis Trystram. Springer Verlag, 1992. pp. 743-748 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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Parallelism control scheme in a dataflow architecture

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