TY - GEN
T1 - Performance evaluation of 3D stacked multi-core processors with temperature consideration
AU - Hanada, Takaaki
AU - Sasaki, Hiroshi
AU - Inoue, Koji
AU - Murakami, Kazuaki
PY - 2011/12/1
Y1 - 2011/12/1
N2 - 3D stacked multi-core processor is one of the applications of 3D integration technology. It achieves high bandwidth access to last level cache and allows to increase the number of cores while maintaining the package area. Although, 3D multi-core temperature increases with the number of stacked dies because of the escalating power density and thermal resistivity. Therefore, 3D multi-cores require lower clock frequencies for keeping the temperature under a safe constraint, so that performance is not always improved. In this paper, we evaluate the performance of 3D stacked multi-cores running under temperature constraints, and we show that there is a trade-off between clock frequency and parallel capability.
AB - 3D stacked multi-core processor is one of the applications of 3D integration technology. It achieves high bandwidth access to last level cache and allows to increase the number of cores while maintaining the package area. Although, 3D multi-core temperature increases with the number of stacked dies because of the escalating power density and thermal resistivity. Therefore, 3D multi-cores require lower clock frequencies for keeping the temperature under a safe constraint, so that performance is not always improved. In this paper, we evaluate the performance of 3D stacked multi-cores running under temperature constraints, and we show that there is a trade-off between clock frequency and parallel capability.
UR - http://www.scopus.com/inward/record.url?scp=84866853541&partnerID=8YFLogxK
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U2 - 10.1109/3DIC.2012.6263025
DO - 10.1109/3DIC.2012.6263025
M3 - Conference contribution
AN - SCOPUS:84866853541
SN - 9781467321891
T3 - 2011 IEEE International 3D Systems Integration Conference, 3DIC 2011
BT - 2011 IEEE International 3D Systems Integration Conference, 3DIC 2011
T2 - 2011 IEEE International 3D Systems Integration Conference, 3DIC 2011
Y2 - 31 January 2012 through 2 February 2012
ER -