Performance evaluation of a reconfigurable set processor

Farhad Mehdipour, Hamid Noori, Hiroaki Honda, Koji Inoue, Kazuaki Murakami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Performance evaluation is a serious challenge in designing optimizing reconfigurable instruction set processors. A combined and simulation-based model (CAnSO?) is proposed and for performance evaluation of a typical reconfigurable set processor. The proposed model consists of an core that incorporates statistics gathered from cycleaccurate to make a reasonable evaluation. CAnSO has speed advantages and compared to cycle-accurate simulation, proves almost 2% variation in the speedup measurement.

Original languageEnglish
Title of host publication2008 International SoC Design Conference, ISOCC 2008
PagesI184-I187
DOIs
Publication statusPublished - Dec 1 2008
Event2008 International SoC Design Conference, ISOCC 2008 - Busan, Korea, Republic of
Duration: Nov 24 2008Nov 25 2008

Publication series

Name2008 International SoC Design Conference, ISOCC 2008
Volume1

Other

Other2008 International SoC Design Conference, ISOCC 2008
CountryKorea, Republic of
CityBusan
Period11/24/0811/25/08

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All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Software

Cite this

Mehdipour, F., Noori, H., Honda, H., Inoue, K., & Murakami, K. (2008). Performance evaluation of a reconfigurable set processor. In 2008 International SoC Design Conference, ISOCC 2008 (pp. I184-I187). [4815603] (2008 International SoC Design Conference, ISOCC 2008; Vol. 1). https://doi.org/10.1109/SOCDC.2008.4815603