Power Loss Reduction of Low-Voltage Power MOSFET by Combination of Assist Gate Structure and Gate Control Technology

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A new structure with the optimum gate control is proposed for low power loss operation of low-voltage power MOSFETs. Although the application system requires continuing the on-resistance RonA reduction for more power efficiency improvement, RonA trend is facing the theoretical limit even with the FP technology. Assist Gate (AG) structure was proposed to improve the RonA and turn-off loss Eoff tradeoff, because the channel and drift resistances can be reduced with avoiding the Cgd increase by dual gate control. Dual gate control with synchronous rectify (SR) of AG-MOSFET also improves turn-on switching performance. This paper shows the AG-MOSFET with optimum gate control achieves 27% lower turn-on loss Eon and 42% lower surge current compared with no SR operation. A case study of the half-bridge application also shows 17% to 46% of total power loss reduction.

Original languageEnglish
Title of host publication2021 33rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages271-274
Number of pages4
ISBN (Electronic)9784886864222
DOIs
Publication statusPublished - May 30 2021
Event33rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2021 - Virtual, Nagoya, Japan
Duration: May 30 2021Jun 3 2021

Publication series

NameProceedings of the International Symposium on Power Semiconductor Devices and ICs
Volume2021-May
ISSN (Print)1063-6854

Conference

Conference33rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2021
Country/TerritoryJapan
CityVirtual, Nagoya
Period5/30/216/3/21

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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