Power-Pro: Programmable Power Management Architecture

Tohru Ishihara, Hiroto Yasuura

Research output: Contribution to conferencePaperpeer-review

5 Citations (Scopus)

Abstract

This paper presents Power-Pro architecture (Programmable Power Management Architecture), a novel processor architecture for power reduction. Power-Pro architecture has following two functionalities, (i) Supply voltage and clock frequency can be dynamically varied, (ii) Active data-path width can be dynamically adjusted to requirement of application programs. For the application programs which require less performance or less data-path width, Power-Pro architecture realize dramatic power reduction.

Original languageEnglish
Pages321-322
Number of pages2
Publication statusPublished - Dec 1 1998
EventProceedings of the 1998 3rd Conference of the Asia and South Pacific Design Automation (ASP-DAC '98) - Yokohama, Jpn
Duration: Feb 10 1998Feb 13 1998

Conference

ConferenceProceedings of the 1998 3rd Conference of the Asia and South Pacific Design Automation (ASP-DAC '98)
CityYokohama, Jpn
Period2/10/982/13/98

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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