Practical challenges in logic BIST Implementation - Case studies

Shianling Wu, Hiroshi Furukawa, Boryau Sheu, Laung Terng Wang, Hao Jan Chao, Lizhen Yu, Xiaoqing Wen, Michio Murakami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

TurboBIST-Logic (TBL) is a software tool suite for incorporating logic built-in self-test (BIST) technology into digital Integrated Circuits and has been used by a variety of industrial designs globally since 2002. This abstract describes major features of TBL, and uses three industrial cases to show practical issues encountered and solved over the years. It also discusses an important new trend in going "hybrid," a flexible combination of capture-clocking schemes, with the goal to achieve an ever more optimal result over stand-alone schemes. Each of the three cases had its unique requirements for logic BIST, some needing to customize an existing solution, but all were set to achieve common BIST goals of at-speed testing, simple test interface to/from ATE, low test cost, high product reliability, and repeat testability investment reuse from IC, board, system, to in-field diagnosis.

Original languageEnglish
Title of host publicationProceedings of the 17th Asian Test Symposium, ATS 2008
Number of pages1
DOIs
Publication statusPublished - Dec 1 2008
Event17th Asian Test Symposium, ATS 2008 - Sapporo, Japan
Duration: Nov 24 2008Nov 27 2008

Publication series

NameProceedings of the Asian Test Symposium
ISSN (Print)1081-7735

Other

Other17th Asian Test Symposium, ATS 2008
CountryJapan
CitySapporo
Period11/24/0811/27/08

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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