Recent progress of junction technology for germanium CMOS

Tomonori Nishimura, Choong Hyun Lee, Toshimitsu Nakamura, Takeaki Yajima, Kosuke Nagashio, Koji Kita, Akira Toriumi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

To realize scaled Ge CMOS device, there are several challenges of junction formation in nMOSFET. (Fermi level pinning, activation and diffusion of n-type impurities and junction leakage, etc.) In this paper, we report recent progresses of controllability of band alignment at metal/Ge interface, understanding of n-type impurity activation in Ge, and impact of oxygen in Ge on n+/p junction leakage.

Original languageEnglish
Title of host publication15th International Workshop on Junction Technology, IWJT 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages65-68
Number of pages4
ISBN (Electronic)9784863485174
DOIs
Publication statusPublished - May 9 2016
Externally publishedYes
Event15th International Workshop on Junction Technology, IWJT 2015 - Kyoto, Japan
Duration: Jun 11 2015Jun 12 2015

Publication series

Name15th International Workshop on Junction Technology, IWJT 2015

Other

Other15th International Workshop on Junction Technology, IWJT 2015
CountryJapan
CityKyoto
Period6/11/156/12/15

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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