Reducing power consumption of instruction ROMs by exploiting instruction frequency

Inoue Koji, V. G. Moshnyaga, K. Murakami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

This paper proposes a new approach to reducing the power consumption of instruction ROMs for embedded systems. The power consumption of instruction ROMs strongly depends on the switching activity of bit-lines. If a read bit-value indicates '0', the precharged bitline is discharged. In this scenario, a bit-line switching takes place and consumes power. Otherwise, the precharged bit-line level is maintained until the next access, thus no bit-line switching occurs. In our approach, the binary-patterns to be assigned to op-codes are determined based on the frequency of instructions for reducing the bit-line switching activity. Application programs are analyzed in advance, and then binary-patterns including many '1's' are assigned to the most frequently referenced instructions. In our evaluation, it is observed that the proposed approach can reduce bit-line switching by 40%.

Original languageEnglish
Title of host publicationProceedings - APCCAS 2002
Subtitle of host publicationAsia-Pacific Conference on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-6
Number of pages6
ISBN (Electronic)0780376900
DOIs
Publication statusPublished - Jan 1 2002
Externally publishedYes
EventAsia-Pacific Conference on Circuits and Systems, APCCAS 2002 - Denpasar, Bali, Indonesia
Duration: Oct 28 2002Oct 31 2002

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Volume2

Other

OtherAsia-Pacific Conference on Circuits and Systems, APCCAS 2002
CountryIndonesia
CityDenpasar, Bali
Period10/28/0210/31/02

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Koji, I., Moshnyaga, V. G., & Murakami, K. (2002). Reducing power consumption of instruction ROMs by exploiting instruction frequency. In Proceedings - APCCAS 2002: Asia-Pacific Conference on Circuits and Systems (pp. 1-6). [1115094] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; Vol. 2). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2002.1115094