Semantics of a hardware design language for Japanese standardization

Hiroto Yasuura, Nagisa Ishiura

Research output: Contribution to journalConference articlepeer-review

2 Citations (Scopus)

Abstract

The authors propose a novel approach to the defining of the formal semantics of a hardware design language (HDL) in the Japanese LSI design language standardization project. The approach is to separate the definition of semantics from simulators. Since the semantics includes nondeterminism, it is possible to describe the vagueness of circuit behavior such as dispersion of delays without linguistic ambiguity. The authors introduce a new computation model of hardware behavior called the NES (nondeterministic event sequence) model. The NES model is a very simple model of computation in digital systems and provides an intuitive understanding of the concurrent behavior of HDL description without loss of mathematical strictness.

Original languageEnglish
Pages (from-to)836-839
Number of pages4
JournalProceedings - Design Automation Conference
DOIs
Publication statusPublished - 1989
Externally publishedYes
Event26th ACM/IEEE Design Automation Conference - Las Vegas, NV, USA
Duration: Jun 25 1989Jun 29 1989

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering

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