Signal probability control for relieving NBTI in SRAM cells

Yuji Kunitake, Toshinori Sato, Hiroto Yasuura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Citations (Scopus)

Abstract

Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage degradation in a PMOS transistor which is biased to negative voltage. In an SRAM cell, due to NBTI, threshold voltage degrades in the load PMOS transistors. The degradation has the impact on Static Noise Margin (SNM), which is a measure of read stability of a 6-T SRAM cell. In this paper, we discuss the relationship between NBTI degradation in an SRAM cell and the signal probability. This is because, it is the key parameter of NBTI degradation. Based on the observations, we propose a novel cell-flipping technique in order to make signal probability close to 50%. The long cell-flipping period leads to threshold voltage degradation as large as the original case where the cell-flipping technique is not applied. Thus, we employ the short flipping period to the cell-flipping technique without any stall of operations. In consequence of applying the cell-flipping technique to a register file, we can relieve threshold voltage degradation by 70% after the SRAM cell is used for 3 years.

Original languageEnglish
Title of host publicationProceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010
Pages660-666
Number of pages7
DOIs
Publication statusPublished - 2010
Event11th International Symposium on Quality Electronic Design, ISQED 2010 - San Jose, CA, United States
Duration: Mar 22 2010Mar 24 2010

Other

Other11th International Symposium on Quality Electronic Design, ISQED 2010
CountryUnited States
CitySan Jose, CA
Period3/22/103/24/10

Fingerprint

Static random access storage
Threshold voltage
Degradation
Transistors
Negative bias temperature instability
Electric potential

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Kunitake, Y., Sato, T., & Yasuura, H. (2010). Signal probability control for relieving NBTI in SRAM cells. In Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010 (pp. 660-666). [5450504] https://doi.org/10.1109/ISQED.2010.5450504

Signal probability control for relieving NBTI in SRAM cells. / Kunitake, Yuji; Sato, Toshinori; Yasuura, Hiroto.

Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. 2010. p. 660-666 5450504.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kunitake, Y, Sato, T & Yasuura, H 2010, Signal probability control for relieving NBTI in SRAM cells. in Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010., 5450504, pp. 660-666, 11th International Symposium on Quality Electronic Design, ISQED 2010, San Jose, CA, United States, 3/22/10. https://doi.org/10.1109/ISQED.2010.5450504
Kunitake Y, Sato T, Yasuura H. Signal probability control for relieving NBTI in SRAM cells. In Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. 2010. p. 660-666. 5450504 https://doi.org/10.1109/ISQED.2010.5450504
Kunitake, Yuji ; Sato, Toshinori ; Yasuura, Hiroto. / Signal probability control for relieving NBTI in SRAM cells. Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. 2010. pp. 660-666
@inproceedings{5425c924ad9e4c70a331743c17177d7d,
title = "Signal probability control for relieving NBTI in SRAM cells",
abstract = "Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage degradation in a PMOS transistor which is biased to negative voltage. In an SRAM cell, due to NBTI, threshold voltage degrades in the load PMOS transistors. The degradation has the impact on Static Noise Margin (SNM), which is a measure of read stability of a 6-T SRAM cell. In this paper, we discuss the relationship between NBTI degradation in an SRAM cell and the signal probability. This is because, it is the key parameter of NBTI degradation. Based on the observations, we propose a novel cell-flipping technique in order to make signal probability close to 50{\%}. The long cell-flipping period leads to threshold voltage degradation as large as the original case where the cell-flipping technique is not applied. Thus, we employ the short flipping period to the cell-flipping technique without any stall of operations. In consequence of applying the cell-flipping technique to a register file, we can relieve threshold voltage degradation by 70{\%} after the SRAM cell is used for 3 years.",
author = "Yuji Kunitake and Toshinori Sato and Hiroto Yasuura",
year = "2010",
doi = "10.1109/ISQED.2010.5450504",
language = "English",
isbn = "9781424464555",
pages = "660--666",
booktitle = "Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010",

}

TY - GEN

T1 - Signal probability control for relieving NBTI in SRAM cells

AU - Kunitake, Yuji

AU - Sato, Toshinori

AU - Yasuura, Hiroto

PY - 2010

Y1 - 2010

N2 - Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage degradation in a PMOS transistor which is biased to negative voltage. In an SRAM cell, due to NBTI, threshold voltage degrades in the load PMOS transistors. The degradation has the impact on Static Noise Margin (SNM), which is a measure of read stability of a 6-T SRAM cell. In this paper, we discuss the relationship between NBTI degradation in an SRAM cell and the signal probability. This is because, it is the key parameter of NBTI degradation. Based on the observations, we propose a novel cell-flipping technique in order to make signal probability close to 50%. The long cell-flipping period leads to threshold voltage degradation as large as the original case where the cell-flipping technique is not applied. Thus, we employ the short flipping period to the cell-flipping technique without any stall of operations. In consequence of applying the cell-flipping technique to a register file, we can relieve threshold voltage degradation by 70% after the SRAM cell is used for 3 years.

AB - Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage degradation in a PMOS transistor which is biased to negative voltage. In an SRAM cell, due to NBTI, threshold voltage degrades in the load PMOS transistors. The degradation has the impact on Static Noise Margin (SNM), which is a measure of read stability of a 6-T SRAM cell. In this paper, we discuss the relationship between NBTI degradation in an SRAM cell and the signal probability. This is because, it is the key parameter of NBTI degradation. Based on the observations, we propose a novel cell-flipping technique in order to make signal probability close to 50%. The long cell-flipping period leads to threshold voltage degradation as large as the original case where the cell-flipping technique is not applied. Thus, we employ the short flipping period to the cell-flipping technique without any stall of operations. In consequence of applying the cell-flipping technique to a register file, we can relieve threshold voltage degradation by 70% after the SRAM cell is used for 3 years.

UR - http://www.scopus.com/inward/record.url?scp=77952660520&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77952660520&partnerID=8YFLogxK

U2 - 10.1109/ISQED.2010.5450504

DO - 10.1109/ISQED.2010.5450504

M3 - Conference contribution

SN - 9781424464555

SP - 660

EP - 666

BT - Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010

ER -