Single-flux-quantum cache memory architecture

Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Single-flux-quantum (SFQ) logic is promising technology to realize an incredible microprocessor which operates over 100 GHz due to its ultra-fast-speed and ultra-lowpower natures. Although previous work has demonstrated prototype of an SFQ microprocessor, the SFQ based L1 cache memory has not well optimized: A large access latency and strictly limited scalability. This paper proposes a novel SFQ cache architecture to support fast accesses. The sub-Arrayed structure applied to the cache produces better scalability in terms of capacity. Evaluation results show that the proposed cache achieves 1.8X fast access speed.

Original languageEnglish
Title of host publicationISOCC 2016 - International SoC Design Conference
Subtitle of host publicationSmart SoC for Intelligent Things
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages105-106
Number of pages2
ISBN (Electronic)9781467393089
DOIs
Publication statusPublished - Dec 27 2016
Event13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of
Duration: Oct 23 2016Oct 26 2016

Publication series

NameISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things

Other

Other13th International SoC Design Conference, ISOCC 2016
CountryKorea, Republic of
CityJeju
Period10/23/1610/26/16

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Instrumentation

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