Sn concentration effects on polycrystalline GeSn thin film transistors

Kenta Moto, Keisuke Yamamoto, Toshifumi Imajo, Takashi Suemasu, Hiroshi Nakashima, Kaoru Toko

Research output: Contribution to journalArticlepeer-review

Abstract

Thin-film transistor (TFT) applications of GeSn have attracted attention as a means of improving the performance of electronic devices. Based on our advanced solid-phase crystallization and TFT process technologies, we comprehensively studied the relationship between the film properties and TFT characteristics of polycrystalline GeSn. The initial Sn concentration xi significantly changed the crystal and electrical properties of the GeSn layer. Excess Sn (xi ≥ 4.5%) precipitated in GeSn and degraded its properties, whereas the appropriate amount of Sn effectively passivated defects in Ge and reduced the density of defect-induced acceptors and grain boundary traps while maintaining a high Hall hole mobility (> 200 cm2 V-1 s-1). The performance of the accumulation-mode TFTs fabricated under 400 °C also strongly depended on xi, achieving both a high field-effect mobility (170 cm2 V-1 s-1) and on/off ratio (103) at xi = 1.6%. This performance was shown to be the highest among Ge-based TFTs with grain boundaries in the channel.

Original languageEnglish
JournalIEEE Electron Device Letters
DOIs
Publication statusAccepted/In press - 2021

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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