SOI bipolar-MOS merged transistors for BiCMOS application

Yue Sheng Zheng, Tanemasa Asano

Research output: Contribution to journalArticle

Abstract

A new MOSFET which has a built-in bipolar operation mechanism at the drain region has been fabricated using a bond-and-lap technique to form a silicon on insulator (SOI) structure. The results show that the merged transistors increase the transconductance by 15 times for a pMOS/npn transistor and by 60 times for an nMOS/pnp transistor as compared with conventional MOSFETs.

Original languageEnglish
Pages (from-to)1203-1204
Number of pages2
JournalElectronics Letters
Volume35
Issue number14
DOIs
Publication statusPublished - Jul 8 1999
Externally publishedYes

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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