Statistical performance-driven module binding in high-level synthesis

Hiroyuki Tomiyama, Akihiko Inoue, Hiroto Yasuura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

The inevitable fluctuation in fabrication processes results in LSI chips with various critical path delay even though all the chips are fabricated from the same design. Therefore, in LSI design, it is important to estimate what percentage of the fabricated chips will achieve the performance level and to maximize the percentage. This paper presents a model and a method to analyze statistical delay of RT-level data path designs. The method predicts the probability that the fabricated circuits will work at a user specified clock period. Using the method, we can estimate a tight bound on the worst case critical path delay of the circuits. Based on the delay analysis method, a high-level module binding algorithm which maximizes the probability is also proposed. Experimental results demonstrate that the proposed statistical delay analysis method leads to lower cost or higher-performance designs than conventional delay analysis methods.

Original languageEnglish
Title of host publicationProceedings of the 11th International Symposium on System Synthesis, ISSS 1998
PublisherIEEE Computer Society
Pages66-71
Number of pages6
VolumePart F129250
ISBN (Electronic)0818686235, 9780818686238
Publication statusPublished - Dec 2 1998
Event11th International Symposium on System Synthesis, ISSS 1998 - Hsinchu, Taiwan, Province of China
Duration: Dec 2 1998Dec 4 1998

Other

Other11th International Symposium on System Synthesis, ISSS 1998
CountryTaiwan, Province of China
CityHsinchu
Period12/2/9812/4/98

Fingerprint

Networks (circuits)
Clocks
Fabrication
High level synthesis
Costs

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

Cite this

Tomiyama, H., Inoue, A., & Yasuura, H. (1998). Statistical performance-driven module binding in high-level synthesis. In Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998 (Vol. Part F129250, pp. 66-71). IEEE Computer Society.

Statistical performance-driven module binding in high-level synthesis. / Tomiyama, Hiroyuki; Inoue, Akihiko; Yasuura, Hiroto.

Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998. Vol. Part F129250 IEEE Computer Society, 1998. p. 66-71.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tomiyama, H, Inoue, A & Yasuura, H 1998, Statistical performance-driven module binding in high-level synthesis. in Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998. vol. Part F129250, IEEE Computer Society, pp. 66-71, 11th International Symposium on System Synthesis, ISSS 1998, Hsinchu, Taiwan, Province of China, 12/2/98.
Tomiyama H, Inoue A, Yasuura H. Statistical performance-driven module binding in high-level synthesis. In Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998. Vol. Part F129250. IEEE Computer Society. 1998. p. 66-71
Tomiyama, Hiroyuki ; Inoue, Akihiko ; Yasuura, Hiroto. / Statistical performance-driven module binding in high-level synthesis. Proceedings of the 11th International Symposium on System Synthesis, ISSS 1998. Vol. Part F129250 IEEE Computer Society, 1998. pp. 66-71
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