Abstract
Plasma-process induced degradation of gate oxide of metal/oxide/silicon (MOS) devices on silicon-on-insulator (SOI) structures and bulk wafers was investigated. In order to evaluate the degradation of the gate oxide, the charge-to-breakdown Qbd of the MOS capacitors was measured under a constant current condition. It was found that the degradation of the gate oxide could be drastically suppressed using SOI. A thicker buried oxide layer showed greater suppression of the gate oxide degradation. A smaller device island size showed lower gate oxide degradation, although the dependence was rather weak. An electrical model is discussed, to account for the effect of SOI, in which the capacitance of the buried oxide played a key role in suppressing the degradation.
| Original language | English |
|---|---|
| Pages (from-to) | 1278-1281 |
| Number of pages | 4 |
| Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
| Volume | 37 |
| Issue number | 3 SUPPL. B |
| Publication status | Published - Mar 1 1998 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
- Physics and Astronomy(all)
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Suppressing plasma induced degradation of gate oxide using silicon-on-insulator structures. / Arita, Kiyoshi; Akamatsu, Masashi; Asano, Tanemasa.
In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 37, No. 3 SUPPL. B, 01.03.1998, p. 1278-1281.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Suppressing plasma induced degradation of gate oxide using silicon-on-insulator structures
AU - Arita, Kiyoshi
AU - Akamatsu, Masashi
AU - Asano, Tanemasa
PY - 1998/3/1
Y1 - 1998/3/1
N2 - Plasma-process induced degradation of gate oxide of metal/oxide/silicon (MOS) devices on silicon-on-insulator (SOI) structures and bulk wafers was investigated. In order to evaluate the degradation of the gate oxide, the charge-to-breakdown Qbd of the MOS capacitors was measured under a constant current condition. It was found that the degradation of the gate oxide could be drastically suppressed using SOI. A thicker buried oxide layer showed greater suppression of the gate oxide degradation. A smaller device island size showed lower gate oxide degradation, although the dependence was rather weak. An electrical model is discussed, to account for the effect of SOI, in which the capacitance of the buried oxide played a key role in suppressing the degradation.
AB - Plasma-process induced degradation of gate oxide of metal/oxide/silicon (MOS) devices on silicon-on-insulator (SOI) structures and bulk wafers was investigated. In order to evaluate the degradation of the gate oxide, the charge-to-breakdown Qbd of the MOS capacitors was measured under a constant current condition. It was found that the degradation of the gate oxide could be drastically suppressed using SOI. A thicker buried oxide layer showed greater suppression of the gate oxide degradation. A smaller device island size showed lower gate oxide degradation, although the dependence was rather weak. An electrical model is discussed, to account for the effect of SOI, in which the capacitance of the buried oxide played a key role in suppressing the degradation.
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UR - http://www.scopus.com/inward/citedby.url?scp=0039196338&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0039196338
VL - 37
SP - 1278
EP - 1281
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
SN - 0021-4922
IS - 3 SUPPL. B
ER -