Abstract
The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generation units. A novel and efficient algorithm called 'conflict free partitioning' is proposed to synthesis parallel index generation units. Experimental results show the proposed method outperforms other existing methods.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - Design, Automation and Test in Europe, DATE 2014 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Print) | 9783981537024 |
| DOIs | |
| Publication status | Published - 2014 |
| Event | 17th Design, Automation and Test in Europe, DATE 2014 - Dresden, Germany Duration: Mar 24 2014 → Mar 28 2014 |
Other
| Other | 17th Design, Automation and Test in Europe, DATE 2014 |
|---|---|
| Country | Germany |
| City | Dresden |
| Period | 3/24/14 → 3/28/14 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
Synthesis algorithm of parallel index generation units. / Matsunaga, Yusuke.
Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 6800511.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Synthesis algorithm of parallel index generation units
AU - Matsunaga, Yusuke
PY - 2014
Y1 - 2014
N2 - The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generation units. A novel and efficient algorithm called 'conflict free partitioning' is proposed to synthesis parallel index generation units. Experimental results show the proposed method outperforms other existing methods.
AB - The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generation units. A novel and efficient algorithm called 'conflict free partitioning' is proposed to synthesis parallel index generation units. Experimental results show the proposed method outperforms other existing methods.
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U2 - 10.7873/DATE2014.310
DO - 10.7873/DATE2014.310
M3 - Conference contribution
AN - SCOPUS:84903825811
SN - 9783981537024
BT - Proceedings - Design, Automation and Test in Europe, DATE 2014
PB - Institute of Electrical and Electronics Engineers Inc.
ER -