System LSI design methods for low power LSIs

Hiroto Yasuura; Tohru Ishihara

System LSI design methods for low power LSIs

Hiroto Yasuura, Tohru Ishihara

Trustee(Vice President)

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

Low Power design has emerged as a both practically and theoretically attractive theme in modern LSI system design. This paper presents system level power optimization techniques. A brief survey of system level low power design approaches and several examples in detail are described. It reviews some techniques that have been proposed to overcome the power issue and gives guideline for prospective system level solutions.

Original language	English
Pages (from-to)	143-152
Number of pages	10
Journal	IEICE Transactions on Electronics
Volume	E83-C
Issue number	2
Publication status	Published - 2000

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

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AU - Ishihara, Tohru

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System LSI design methods for low power LSIs

Abstract

All Science Journal Classification (ASJC) codes

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