TY - GEN
T1 - Task scheduling for reliable cache architectures of multiprocessor systems
AU - Sugihara, Makoto
AU - Ishihara, Tohru
AU - Murakami, Kazuaki
PY - 2007/9/4
Y1 - 2007/9/4
N2 - This paper presents a task scheduling method for reliable cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the usage of vulnerable SRAMs under real-time constraints. A mixed integer programming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that our task scheduling method achieved 47.7-99.9% less vulnerability than a conventional approach.
AB - This paper presents a task scheduling method for reliable cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the usage of vulnerable SRAMs under real-time constraints. A mixed integer programming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that our task scheduling method achieved 47.7-99.9% less vulnerability than a conventional approach.
UR - http://www.scopus.com/inward/record.url?scp=34548329374&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34548329374&partnerID=8YFLogxK
U2 - 10.1109/DATE.2007.364511
DO - 10.1109/DATE.2007.364511
M3 - Conference contribution
AN - SCOPUS:34548329374
SN - 3981080122
SN - 9783981080124
T3 - Proceedings -Design, Automation and Test in Europe, DATE
SP - 1490
EP - 1495
BT - Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007
T2 - 2007 Design, Automation and Test in Europe Conference and Exhibition
Y2 - 15 April 2007 through 19 April 2007
ER -