Task scheduling for reliable cache architectures of multiprocessor systems

Makoto Sugihara, Tohru Ishihara, Kazuaki Murakami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

This paper presents a task scheduling method for reliable cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the usage of vulnerable SRAMs under real-time constraints. A mixed integer programming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that our task scheduling method achieved 47.7-99.9% less vulnerability than a conventional approach.

Original languageEnglish
Title of host publicationProceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007
Pages1490-1495
Number of pages6
DOIs
Publication statusPublished - Sep 4 2007
Event2007 Design, Automation and Test in Europe Conference and Exhibition - Nice Acropolis, France
Duration: Apr 16 2007Apr 20 2007

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other2007 Design, Automation and Test in Europe Conference and Exhibition
CountryFrance
CityNice Acropolis
Period4/16/074/20/07

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Sugihara, M., Ishihara, T., & Murakami, K. (2007). Task scheduling for reliable cache architectures of multiprocessor systems. In Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007 (pp. 1490-1495). [4212021] (Proceedings -Design, Automation and Test in Europe, DATE). https://doi.org/10.1109/DATE.2007.364511