Abstract
Scalability and cost considerations suggest that distributed and distributed shared memory parallel computers will dominate future parallel architectures. These machines could not be used effectively unless efficient automatic and static solutions to the data partitioning and placement problem become available. Significant progress toward this end has been made in the last few years, but we are still far from having general solutions which are efficient for all classes of applications. In this paper we propose the data partitioning graph (DPG) as an intermediate representation for parallelizing compilers, which augments previous intermediate representations, and provides a framework for carrying out partitioning and placement of not only regular data structures (such as arrays), but also of irregular structures and scalar variables. Although recent approaches to task-graph-based intermediate representations focus on representing data and control dependencies between tasks, they largely ignore the use of program variables by the different tasks. Traditional data partitioning methods usually employ algorithm-dependent techniques, and are considered independently of processor assignments (which ought to be handled simultaneously with data partitioning). Moreover, approaches to data partitioning concentrate exclusively on array structures. By explicitly encapsulating the use of program variables by the task nodes, the DPG provides a framework for handling data partitioning as well as processor assignment in the same context. We also discuss the hierarchical data partitioning graph (HDPG) which encapsulates the hierarchy of the compiled programs and is used to map the hierarchy of computations to massively parallel computers with distributed memory system.
| Original language | English |
|---|---|
| Title of host publication | Languages and Compilers for Parallel Computing - 7th International Workshop, 1994, Proceedings |
| Editors | Keshav Pingali, David Padua, Alex Nicolau, Utpal Banerjee, David Gelernter |
| Publisher | Springer Verlag |
| Pages | 170-185 |
| Number of pages | 16 |
| ISBN (Print) | 354058868X, 9783540588689 |
| Publication status | Published - Jan 1 1995 |
| Event | 7th International Workshop on Languages and Compilers for Parallel Computing, 1994 - Ithaca, United States Duration: Aug 8 1994 → Aug 10 1994 |
Publication series
| Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| Volume | 892 |
| ISSN (Print) | 0302-9743 |
| ISSN (Electronic) | 1611-3349 |
Other
| Other | 7th International Workshop on Languages and Compilers for Parallel Computing, 1994 |
|---|---|
| Country | United States |
| City | Ithaca |
| Period | 8/8/94 → 8/10/94 |
Fingerprint
All Science Journal Classification (ASJC) codes
- Theoretical Computer Science
- Computer Science(all)
Cite this
The data partitioning graph : Extending data and control dependencies for data partitioning. / Nakanishi, Tsuneo; Joe, Kazuki; Saito, Hideki; Polychronopoulos, Constantine D.; Fukuda, Akira; Araki, Keijiro.
Languages and Compilers for Parallel Computing - 7th International Workshop, 1994, Proceedings. ed. / Keshav Pingali; David Padua; Alex Nicolau; Utpal Banerjee; David Gelernter. Springer Verlag, 1995. p. 170-185 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 892).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - The data partitioning graph
T2 - Extending data and control dependencies for data partitioning
AU - Nakanishi, Tsuneo
AU - Joe, Kazuki
AU - Saito, Hideki
AU - Polychronopoulos, Constantine D.
AU - Fukuda, Akira
AU - Araki, Keijiro
PY - 1995/1/1
Y1 - 1995/1/1
N2 - Scalability and cost considerations suggest that distributed and distributed shared memory parallel computers will dominate future parallel architectures. These machines could not be used effectively unless efficient automatic and static solutions to the data partitioning and placement problem become available. Significant progress toward this end has been made in the last few years, but we are still far from having general solutions which are efficient for all classes of applications. In this paper we propose the data partitioning graph (DPG) as an intermediate representation for parallelizing compilers, which augments previous intermediate representations, and provides a framework for carrying out partitioning and placement of not only regular data structures (such as arrays), but also of irregular structures and scalar variables. Although recent approaches to task-graph-based intermediate representations focus on representing data and control dependencies between tasks, they largely ignore the use of program variables by the different tasks. Traditional data partitioning methods usually employ algorithm-dependent techniques, and are considered independently of processor assignments (which ought to be handled simultaneously with data partitioning). Moreover, approaches to data partitioning concentrate exclusively on array structures. By explicitly encapsulating the use of program variables by the task nodes, the DPG provides a framework for handling data partitioning as well as processor assignment in the same context. We also discuss the hierarchical data partitioning graph (HDPG) which encapsulates the hierarchy of the compiled programs and is used to map the hierarchy of computations to massively parallel computers with distributed memory system.
AB - Scalability and cost considerations suggest that distributed and distributed shared memory parallel computers will dominate future parallel architectures. These machines could not be used effectively unless efficient automatic and static solutions to the data partitioning and placement problem become available. Significant progress toward this end has been made in the last few years, but we are still far from having general solutions which are efficient for all classes of applications. In this paper we propose the data partitioning graph (DPG) as an intermediate representation for parallelizing compilers, which augments previous intermediate representations, and provides a framework for carrying out partitioning and placement of not only regular data structures (such as arrays), but also of irregular structures and scalar variables. Although recent approaches to task-graph-based intermediate representations focus on representing data and control dependencies between tasks, they largely ignore the use of program variables by the different tasks. Traditional data partitioning methods usually employ algorithm-dependent techniques, and are considered independently of processor assignments (which ought to be handled simultaneously with data partitioning). Moreover, approaches to data partitioning concentrate exclusively on array structures. By explicitly encapsulating the use of program variables by the task nodes, the DPG provides a framework for handling data partitioning as well as processor assignment in the same context. We also discuss the hierarchical data partitioning graph (HDPG) which encapsulates the hierarchy of the compiled programs and is used to map the hierarchy of computations to massively parallel computers with distributed memory system.
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UR - http://www.scopus.com/inward/citedby.url?scp=84947795756&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84947795756
SN - 354058868X
SN - 9783540588689
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 170
EP - 185
BT - Languages and Compilers for Parallel Computing - 7th International Workshop, 1994, Proceedings
A2 - Pingali, Keshav
A2 - Padua, David
A2 - Nicolau, Alex
A2 - Banerjee, Utpal
A2 - Gelernter, David
PB - Springer Verlag
ER -