Time parameterized function method: a new method for hardware verification with the Boyer-Moore theorem prover

Kazuko Takahashi, Hiroshi Fujita

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Abstract

We propose a new method for hardware verification using the Boyer-Moore Theorem Prover. In this method, each signal of a sequential circuit is represented not as a waveform, but as a time parameterized function. A user simply describes the logical connection of the components of a circuit, and the separated form is mechanically derived. We formalize the method and show that the method not only realizes an efficient proof but also useful for debugging.

Original languageEnglish
Pages545-552
Number of pages8
Publication statusPublished - Dec 1 1995
Externally publishedYes
EventProceedings of the 1995 Asia and South Pacific Design Automation Conference, ASP-DAC'95 - Chiba, Jpn
Duration: Aug 29 1995Sep 1 1995

Other

OtherProceedings of the 1995 Asia and South Pacific Design Automation Conference, ASP-DAC'95
CityChiba, Jpn
Period8/29/959/1/95

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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