Abstract
Exploiting parallelism at task and instruction levels is the key to advanced general-purpose parallel computing. We are developing a reconfigurable parallel processor system with 128 Sparc microprocessors and a superscalar processor with four operations proceeding in parallel. In the future we plan to replace the Sparcs in the system with the superscalar processon.
Original language | English |
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Pages (from-to) | 16-19 |
Number of pages | 4 |
Journal | IEEE Micro |
Volume | 11 |
Issue number | 4 |
DOIs | |
Publication status | Published - Aug 1991 |
All Science Journal Classification (ASJC) codes
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering