Exploiting parallelism at task and instruction levels is the key to advanced general-purpose parallel computing. We are developing a reconfigurable parallel processor system with 128 Sparc microprocessors and a superscalar processor with four operations proceeding in parallel. In the future we plan to replace the Sparcs in the system with the superscalar processon.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering