Toward Advanced Parallel Processing: Exploiting Parallelism at Task and Instruction Levels

Akira Fukuda, Kazuaki Murakami, Shinji Tomita

Research output: Contribution to journalArticle

Abstract

Exploiting parallelism at task and instruction levels is the key to advanced general-purpose parallel computing. We are developing a reconfigurable parallel processor system with 128 Sparc microprocessors and a superscalar processor with four operations proceeding in parallel. In the future we plan to replace the Sparcs in the system with the superscalar processon.

Original languageEnglish
Pages (from-to)16-19
Number of pages4
JournalIEEE Micro
Volume11
Issue number4
DOIs
Publication statusPublished - Aug 1991

Fingerprint

Parallel processing systems
Microprocessor chips
Processing

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Toward Advanced Parallel Processing : Exploiting Parallelism at Task and Instruction Levels. / Fukuda, Akira; Murakami, Kazuaki; Tomita, Shinji.

In: IEEE Micro, Vol. 11, No. 4, 08.1991, p. 16-19.

Research output: Contribution to journalArticle

Fukuda, Akira ; Murakami, Kazuaki ; Tomita, Shinji. / Toward Advanced Parallel Processing : Exploiting Parallelism at Task and Instruction Levels. In: IEEE Micro. 1991 ; Vol. 11, No. 4. pp. 16-19.
@article{7f08f76042ab49a39e94534d2d46efb1,
title = "Toward Advanced Parallel Processing: Exploiting Parallelism at Task and Instruction Levels",
abstract = "Exploiting parallelism at task and instruction levels is the key to advanced general-purpose parallel computing. We are developing a reconfigurable parallel processor system with 128 Sparc microprocessors and a superscalar processor with four operations proceeding in parallel. In the future we plan to replace the Sparcs in the system with the superscalar processon.",
author = "Akira Fukuda and Kazuaki Murakami and Shinji Tomita",
year = "1991",
month = "8",
doi = "10.1109/40.85721",
language = "English",
volume = "11",
pages = "16--19",
journal = "IEEE Micro",
issn = "0272-1732",
publisher = "IEEE Computer Society",
number = "4",

}

TY - JOUR

T1 - Toward Advanced Parallel Processing

T2 - Exploiting Parallelism at Task and Instruction Levels

AU - Fukuda, Akira

AU - Murakami, Kazuaki

AU - Tomita, Shinji

PY - 1991/8

Y1 - 1991/8

N2 - Exploiting parallelism at task and instruction levels is the key to advanced general-purpose parallel computing. We are developing a reconfigurable parallel processor system with 128 Sparc microprocessors and a superscalar processor with four operations proceeding in parallel. In the future we plan to replace the Sparcs in the system with the superscalar processon.

AB - Exploiting parallelism at task and instruction levels is the key to advanced general-purpose parallel computing. We are developing a reconfigurable parallel processor system with 128 Sparc microprocessors and a superscalar processor with four operations proceeding in parallel. In the future we plan to replace the Sparcs in the system with the superscalar processon.

UR - http://www.scopus.com/inward/record.url?scp=0026203201&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0026203201&partnerID=8YFLogxK

U2 - 10.1109/40.85721

DO - 10.1109/40.85721

M3 - Article

AN - SCOPUS:0026203201

VL - 11

SP - 16

EP - 19

JO - IEEE Micro

JF - IEEE Micro

SN - 0272-1732

IS - 4

ER -