Abstract
This paper presents a model of dynamically variable voltage processor and basic theorems for power-delay optimization. A static voltage scheduling problem is also proposed and formulated as an integer linear programming (ILP) problem. In the problem, we assume that a core processor can vary its supply voltage dynamically, but can use only a single voltage level at a time. For a given application program and a dynamically variable voltage processor, a voltage scheduling which minimizes energy consumption under an execution time constraint can be found.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the International Symposium on Low Power Design |
| Editors | Anon |
| Publisher | ACM |
| Pages | 197-202 |
| Number of pages | 6 |
| Publication status | Published - 1998 |
| Event | Proceedings of the 1998 International Symposium on Low Power Electronics and Design - Monterey, CA, USA Duration: Aug 10 1998 → Aug 12 1998 |
Other
| Other | Proceedings of the 1998 International Symposium on Low Power Electronics and Design |
|---|---|
| City | Monterey, CA, USA |
| Period | 8/10/98 → 8/12/98 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
Voltage scheduling problem for dynamically variable voltage processors. / Ishihara, Tohru; Yasuura, Hiroto.
Proceedings of the International Symposium on Low Power Design. ed. / Anon. ACM, 1998. p. 197-202.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Voltage scheduling problem for dynamically variable voltage processors
AU - Ishihara, Tohru
AU - Yasuura, Hiroto
PY - 1998
Y1 - 1998
N2 - This paper presents a model of dynamically variable voltage processor and basic theorems for power-delay optimization. A static voltage scheduling problem is also proposed and formulated as an integer linear programming (ILP) problem. In the problem, we assume that a core processor can vary its supply voltage dynamically, but can use only a single voltage level at a time. For a given application program and a dynamically variable voltage processor, a voltage scheduling which minimizes energy consumption under an execution time constraint can be found.
AB - This paper presents a model of dynamically variable voltage processor and basic theorems for power-delay optimization. A static voltage scheduling problem is also proposed and formulated as an integer linear programming (ILP) problem. In the problem, we assume that a core processor can vary its supply voltage dynamically, but can use only a single voltage level at a time. For a given application program and a dynamically variable voltage processor, a voltage scheduling which minimizes energy consumption under an execution time constraint can be found.
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M3 - Conference contribution
SP - 197
EP - 202
BT - Proceedings of the International Symposium on Low Power Design
A2 - Anon, null
PB - ACM
ER -